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[X86] Properly chain PROBED_ALLOCA / SEG_ALLOCA #116508

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Merged
merged 1 commit into from
Nov 19, 2024
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[X86] Properly chain PROBED_ALLOCA / SEG_ALLOCA #116508

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20 changes: 6 additions & 14 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -25270,13 +25270,9 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
const TargetFrameLowering &TFI = *Subtarget.getFrameLowering();
const Align StackAlign = TFI.getStackAlign();
if (hasInlineStackProbe(MF)) {
MachineRegisterInfo &MRI = MF.getRegInfo();

const TargetRegisterClass *AddrRegClass = getRegClassFor(SPTy);
Register Vreg = MRI.createVirtualRegister(AddrRegClass);
Chain = DAG.getCopyToReg(Chain, dl, Vreg, Size);
Result = DAG.getNode(X86ISD::PROBED_ALLOCA, dl, SPTy, Chain,
DAG.getRegister(Vreg, SPTy));
Result = DAG.getNode(X86ISD::PROBED_ALLOCA, dl, {SPTy, MVT::Other},
{Chain, Size});
Chain = Result.getValue(1);
} else {
SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
Chain = SP.getValue(1);
Expand All @@ -25288,8 +25284,6 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
DAG.getSignedConstant(~(Alignment->value() - 1ULL), dl, VT));
Chain = DAG.getCopyToReg(Chain, dl, SPReg, Result); // Output chain
} else if (SplitStack) {
MachineRegisterInfo &MRI = MF.getRegInfo();

if (Is64Bit) {
// The 64 bit implementation of segmented stacks needs to clobber both r10
// r11. This makes it impossible to use it along with nested parameters.
Expand All @@ -25301,11 +25295,9 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
}
}

const TargetRegisterClass *AddrRegClass = getRegClassFor(SPTy);
Register Vreg = MRI.createVirtualRegister(AddrRegClass);
Chain = DAG.getCopyToReg(Chain, dl, Vreg, Size);
Result = DAG.getNode(X86ISD::SEG_ALLOCA, dl, SPTy, Chain,
DAG.getRegister(Vreg, SPTy));
Result =
DAG.getNode(X86ISD::SEG_ALLOCA, dl, {SPTy, MVT::Other}, {Chain, Size});
Chain = Result.getValue(1);
} else {
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
Chain = DAG.getNode(X86ISD::DYN_ALLOCA, dl, NodeTys, Chain, Size);
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -24,9 +24,9 @@ define i32 @test_basic(i32 %l) #0 {
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_offset %esi, -12
; X86-NEXT: movl 8(%ebp), %esi
; X86-NEXT: movl %esp, %eax
; X86-NEXT: leal 15(,%esi,4), %ecx
; X86-NEXT: andl $-16, %ecx
; X86-NEXT: movl %esp, %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: cmpl %eax, %gs:48
; X86-NEXT: jg .LBB0_4
Expand All @@ -39,17 +39,17 @@ define i32 @test_basic(i32 %l) #0 {
; X86-NEXT: calll __morestack_allocate_stack_space
; X86-NEXT: addl $16, %esp
; X86-NEXT: .LBB0_5:
; X86-NEXT: subl $8, %esp
; X86-NEXT: pushl %esi
; X86-NEXT: pushl %eax
; X86-NEXT: subl $16, %esp
; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, (%esp)
; X86-NEXT: calll dummy_use@PLT
; X86-NEXT: addl $16, %esp
; X86-NEXT: testl %esi, %esi
; X86-NEXT: je .LBB0_6
; X86-NEXT: # %bb.8: # %false
; X86-NEXT: decl %esi
; X86-NEXT: subl $12, %esp
; X86-NEXT: pushl %esi
; X86-NEXT: subl $16, %esp
; X86-NEXT: movl %esi, (%esp)
; X86-NEXT: calll test_basic@PLT
; X86-NEXT: jmp .LBB0_7
; X86-NEXT: .LBB0_6: # %true
Expand Down Expand Up @@ -83,10 +83,10 @@ define i32 @test_basic(i32 %l) #0 {
; X64-NEXT: pushq %rax
; X64-NEXT: .cfi_offset %rbx, -24
; X64-NEXT: movl %edi, %ebx
; X64-NEXT: movl %edi, %eax
; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: movl %ebx, %eax
; X64-NEXT: leaq 15(,%rax,4), %rax
; X64-NEXT: andq $-16, %rax
; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: subq %rax, %rdi
; X64-NEXT: cmpq %rdi, %fs:112
; X64-NEXT: jg .LBB0_4
Expand Down
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