Skip to content

[SDAG] Generalize FSINCOS type legalization (NFC) #116848

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Nov 20, 2024
Merged

[SDAG] Generalize FSINCOS type legalization (NFC) #116848

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
3346889
[SDAG] Generalize FSINCOS type legalization (NFC)
MacDue Nov 19, 2024
d62bd99
Fix format
MacDue Nov 19, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
38 changes: 22 additions & 16 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -791,28 +791,29 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FFREXP(SDNode *N) {
return ReturnVal;
}

SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
assert(!N->isStrictFPOpcode() && "strictfp not implemented for fsincos");
SDValue
DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(SDNode *N,
RTLIB::Libcall LC) {
assert(!N->isStrictFPOpcode() && "strictfp not implemented");
EVT VT = N->getValueType(0);
RTLIB::Libcall LC = RTLIB::getFSINCOS(VT);

if (!TLI.getLibcallName(LC))
return SDValue();

EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
SDValue StackSlotSin = DAG.CreateStackTemporary(NVT);
SDValue StackSlotCos = DAG.CreateStackTemporary(NVT);
SDValue FirstResultSlot = DAG.CreateStackTemporary(NVT);
SDValue SecondResultSlot = DAG.CreateStackTemporary(NVT);

SDLoc DL(N);

TargetLowering::MakeLibCallOptions CallOptions;
std::array Ops{GetSoftenedFloat(N->getOperand(0)), StackSlotSin,
StackSlotCos};
std::array OpsVT{VT, StackSlotSin.getValueType(),
StackSlotCos.getValueType()};
std::array Ops{GetSoftenedFloat(N->getOperand(0)), FirstResultSlot,
SecondResultSlot};
std::array OpsVT{VT, FirstResultSlot.getValueType(),
SecondResultSlot.getValueType()};

// TODO: setTypeListBeforeSoften can't properly express multiple return types,
// but since both returns have the same type for sincos it should be okay.
// but since both returns have the same type it should be okay.
CallOptions.setTypeListBeforeSoften({OpsVT}, VT, true);

auto [ReturnVal, Chain] = TLI.makeLibCall(DAG, LC, NVT, Ops, CallOptions, DL,
Expand All @@ -824,12 +825,17 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FrameIdx);
return DAG.getLoad(NVT, DL, Chain, StackSlot, PtrInfo);
};
SetSoftenedFloat(SDValue(N, 0), CreateStackLoad(StackSlotSin));
SetSoftenedFloat(SDValue(N, 1), CreateStackLoad(StackSlotCos));
SetSoftenedFloat(SDValue(N, 0), CreateStackLoad(FirstResultSlot));
SetSoftenedFloat(SDValue(N, 1), CreateStackLoad(SecondResultSlot));

return SDValue();
}

SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
return SoftenFloatRes_UnaryWithTwoFPResults(
N, RTLIB::getFSINCOS(N->getValueType(0)));
}

SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
return SoftenFloatRes_Binary(N, GetFPLibCall(N->getValueType(0),
RTLIB::REM_F32,
Expand Down Expand Up @@ -2761,7 +2767,7 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
case ISD::FFREXP: R = PromoteFloatRes_FFREXP(N); break;

case ISD::FSINCOS:
R = PromoteFloatRes_FSINCOS(N);
R = PromoteFloatRes_UnaryWithTwoFPResults(N);
break;

case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
Expand Down Expand Up @@ -2959,7 +2965,7 @@ SDValue DAGTypeLegalizer::PromoteFloatRes_FFREXP(SDNode *N) {
return Res;
}

SDValue DAGTypeLegalizer::PromoteFloatRes_FSINCOS(SDNode *N) {
SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryWithTwoFPResults(SDNode *N) {
EVT VT = N->getValueType(0);
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
SDValue Op = GetPromotedFloat(N->getOperand(0));
Expand Down Expand Up @@ -3223,7 +3229,7 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
case ISD::FFREXP: R = SoftPromoteHalfRes_FFREXP(N); break;

case ISD::FSINCOS:
R = SoftPromoteHalfRes_FSINCOS(N);
R = SoftPromoteHalfRes_UnaryWithTwoFPResults(N);
break;

case ISD::LOAD: R = SoftPromoteHalfRes_LOAD(N); break;
Expand Down Expand Up @@ -3382,7 +3388,7 @@ SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FFREXP(SDNode *N) {
return DAG.getNode(GetPromotionOpcode(NVT, OVT), dl, MVT::i16, Res);
}

SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FSINCOS(SDNode *N) {
SDValue DAGTypeLegalizer::SoftPromoteHalfRes_UnaryWithTwoFPResults(SDNode *N) {
EVT OVT = N->getValueType(0);
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
SDValue Op = GetSoftPromotedHalf(N->getOperand(0));
Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -557,6 +557,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
// Convert Float Results to Integer.
void SoftenFloatResult(SDNode *N, unsigned ResNo);
SDValue SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC);
SDValue SoftenFloatRes_UnaryWithTwoFPResults(SDNode *N, RTLIB::Libcall LC);
SDValue SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC);
SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
SDValue SoftenFloatRes_ARITH_FENCE(SDNode *N);
Expand Down Expand Up @@ -743,13 +744,13 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
void PromoteFloatResult(SDNode *N, unsigned ResNo);
SDValue PromoteFloatRes_BITCAST(SDNode *N);
SDValue PromoteFloatRes_BinOp(SDNode *N);
SDValue PromoteFloatRes_UnaryWithTwoFPResults(SDNode *N);
SDValue PromoteFloatRes_ConstantFP(SDNode *N);
SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
SDValue PromoteFloatRes_FMAD(SDNode *N);
SDValue PromoteFloatRes_ExpOp(SDNode *N);
SDValue PromoteFloatRes_FFREXP(SDNode *N);
SDValue PromoteFloatRes_FSINCOS(SDNode *N);
SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
SDValue PromoteFloatRes_STRICT_FP_ROUND(SDNode *N);
SDValue PromoteFloatRes_LOAD(SDNode *N);
Expand Down Expand Up @@ -791,14 +792,14 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
void SoftPromoteHalfResult(SDNode *N, unsigned ResNo);
SDValue SoftPromoteHalfRes_ARITH_FENCE(SDNode *N);
SDValue SoftPromoteHalfRes_BinOp(SDNode *N);
SDValue SoftPromoteHalfRes_UnaryWithTwoFPResults(SDNode *N);
SDValue SoftPromoteHalfRes_BITCAST(SDNode *N);
SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N);
SDValue SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(SDNode *N);
SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N);
SDValue SoftPromoteHalfRes_FMAD(SDNode *N);
SDValue SoftPromoteHalfRes_ExpOp(SDNode *N);
SDValue SoftPromoteHalfRes_FFREXP(SDNode *N);
SDValue SoftPromoteHalfRes_FSINCOS(SDNode *N);
SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N);
SDValue SoftPromoteHalfRes_LOAD(SDNode *N);
SDValue SoftPromoteHalfRes_ATOMIC_LOAD(SDNode *N);
Expand Down
Loading