Skip to content

[llvm][CodeGen] Intrinsic llvm.powi.* code gen for vector arguments #118242

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 7 commits into from
Dec 19, 2024
Merged
Show file tree
Hide file tree
Changes from 2 commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
18 changes: 18 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4648,6 +4648,24 @@ void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) {
bool ExponentHasSizeOfInt =
DAG.getLibInfo().getIntSize() ==
Node->getOperand(1 + Offset).getValueType().getSizeInBits();
if (!ExponentHasSizeOfInt) {
// In some backends, such as RISCV64 and LoongArch64, the i32 type is
// illegal and is promoted by previous process. For such cases, the
// exponent actually matches with sizeof(int) and a libcall should be
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

So DAG.getLibInfo().getIntSize() should be 8?

Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Why would it be 8? getIntSize is in bits and int on RISCV64 is 32 bits.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I would assume getIntSize() would refer to the legalized parameter type for a libcall using int. Is there a second version for this?

Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Not that I know of.

I don't think we should let the vector powi get thisfar . The promotion of a libcall argument is the responsibility of call lowering and the information in TargetLowering::MakeLibCallOptions. We shouldn't promote and then try to fix it.

// generated.
SDNode *ExponentNode = Node->getOperand(1 + Offset).getNode();
unsigned LibIntSize = DAG.getLibInfo().getIntSize();
if (ExponentNode->getOpcode() == ISD::SIGN_EXTEND_INREG ||
ExponentNode->getOpcode() == ISD::AssertSext ||
ExponentNode->getOpcode() == ISD::AssertZext) {
EVT InnerType = cast<VTSDNode>(ExponentNode->getOperand(1))->getVT();
ExponentHasSizeOfInt = LibIntSize == InnerType.getSizeInBits();
} else if (ISD::isExtOpcode(ExponentNode->getOpcode())) {
ExponentHasSizeOfInt =
LibIntSize ==
ExponentNode->getOperand(0).getValueType().getSizeInBits();
}
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This code should not be trying to look through extensions (nor SIGN_EXTEND_INREG, or the Asserts*. These aren't really extensions).

I'd expect this to just insert the sext to match the libcall integer type

}
if (!ExponentHasSizeOfInt) {
// If the exponent does not match with sizeof(int) a libcall to
// RTLIB::POWI would use the wrong type for the argument.
Expand Down
142 changes: 142 additions & 0 deletions llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,142 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <8 x float> @llvm.powi.v8f32.i32(<8 x float>, i32)

define <8 x float> @powi_v8f32(<8 x float> %va, i32 %b) nounwind {
; CHECK-LABEL: powi_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi.d $sp, $sp, -80
; CHECK-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
; CHECK-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
; CHECK-NEXT: xvst $xr0, $sp, 0 # 32-byte Folded Spill
; CHECK-NEXT: addi.w $fp, $a0, 0
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 0
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 0
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 1
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 1
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 2
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 2
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 3
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 3
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 4
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 4
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 5
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 5
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 6
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 6
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 7
; CHECK-NEXT: movgr2fr.w $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a0, 7
; CHECK-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 80
; CHECK-NEXT: ret
entry:
%res = call <8 x float> @llvm.powi.v8f32.i32(<8 x float> %va, i32 %b)
ret <8 x float> %res
}

declare <4 x double> @llvm.powi.v4f64.i32(<4 x double>, i32)

define <4 x double> @powi_v4f64(<4 x double> %va, i32 %b) nounwind {
; CHECK-LABEL: powi_v4f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi.d $sp, $sp, -80
; CHECK-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
; CHECK-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
; CHECK-NEXT: xvst $xr0, $sp, 0 # 32-byte Folded Spill
; CHECK-NEXT: addi.w $fp, $a0, 0
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 0
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powidf2)
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 0
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 1
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powidf2)
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 1
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 2
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powidf2)
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 2
; CHECK-NEXT: xvst $xr0, $sp, 32 # 32-byte Folded Spill
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 3
; CHECK-NEXT: movgr2fr.d $fa0, $a0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powidf2)
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a0, 3
; CHECK-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 80
; CHECK-NEXT: ret
entry:
%res = call <4 x double> @llvm.powi.v4f64.i32(<4 x double> %va, i32 %b)
ret <4 x double> %res
}
88 changes: 88 additions & 0 deletions llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,88 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

declare <4 x float> @llvm.powi.v4f32.i32(<4 x float>, i32)

define <4 x float> @powi_v4f32(<4 x float> %va, i32 %b) nounwind {
; CHECK-LABEL: powi_v4f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi.d $sp, $sp, -48
; CHECK-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
; CHECK-NEXT: st.d $fp, $sp, 32 # 8-byte Folded Spill
; CHECK-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
; CHECK-NEXT: addi.w $fp, $a0, 0
; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0
; CHECK-NEXT: # kill: def $f0 killed $f0 killed $vr0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: vinsgr2vr.w $vr0, $a0, 0
; CHECK-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; CHECK-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
; CHECK-NEXT: vreplvei.w $vr0, $vr0, 1
; CHECK-NEXT: # kill: def $f0 killed $f0 killed $vr0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; CHECK-NEXT: vinsgr2vr.w $vr0, $a0, 1
; CHECK-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; CHECK-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
; CHECK-NEXT: vreplvei.w $vr0, $vr0, 2
; CHECK-NEXT: # kill: def $f0 killed $f0 killed $vr0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; CHECK-NEXT: vinsgr2vr.w $vr0, $a0, 2
; CHECK-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; CHECK-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
; CHECK-NEXT: vreplvei.w $vr0, $vr0, 3
; CHECK-NEXT: # kill: def $f0 killed $f0 killed $vr0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powisf2)
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; CHECK-NEXT: vinsgr2vr.w $vr0, $a0, 3
; CHECK-NEXT: ld.d $fp, $sp, 32 # 8-byte Folded Reload
; CHECK-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 48
; CHECK-NEXT: ret
entry:
%res = call <4 x float> @llvm.powi.v4f32.i32(<4 x float> %va, i32 %b)
ret <4 x float> %res
}

declare <2 x double> @llvm.powi.v2f64.i32(<2 x double>, i32)

define <2 x double> @powi_v2f64(<2 x double> %va, i32 %b) nounwind {
; CHECK-LABEL: powi_v2f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi.d $sp, $sp, -48
; CHECK-NEXT: st.d $ra, $sp, 40 # 8-byte Folded Spill
; CHECK-NEXT: st.d $fp, $sp, 32 # 8-byte Folded Spill
; CHECK-NEXT: vst $vr0, $sp, 0 # 16-byte Folded Spill
; CHECK-NEXT: addi.w $fp, $a0, 0
; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powidf2)
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: vinsgr2vr.d $vr0, $a0, 0
; CHECK-NEXT: vst $vr0, $sp, 16 # 16-byte Folded Spill
; CHECK-NEXT: vld $vr0, $sp, 0 # 16-byte Folded Reload
; CHECK-NEXT: vreplvei.d $vr0, $vr0, 1
; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: bl %plt(__powidf2)
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: vld $vr0, $sp, 16 # 16-byte Folded Reload
; CHECK-NEXT: vinsgr2vr.d $vr0, $a0, 1
; CHECK-NEXT: ld.d $fp, $sp, 32 # 8-byte Folded Reload
; CHECK-NEXT: ld.d $ra, $sp, 40 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 48
; CHECK-NEXT: ret
entry:
%res = call <2 x double> @llvm.powi.v2f64.i32(<2 x double> %va, i32 %b)
ret <2 x double> %res
}
Loading