[AArch64][Clang] Define __ARM_NEON_SVE_BRIDGE unconditionally

clang/lib/Basic/Targets/AArch64.cpp

@@ -447,6 +447,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
   Builder.defineMacro("__ARM_FP16_FORMAT_IEEE", "1");
   Builder.defineMacro("__ARM_FP16_ARGS", "1");
 
+  // Clang supports arm_neon_sve_bridge.h
+  Builder.defineMacro("__ARM_NEON_SVE_BRIDGE", "1");
+
   if (Opts.UnsafeFPMath)
     Builder.defineMacro("__ARM_FP_FAST", "1");
 
@@ -464,9 +467,6 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
   if (FPU & SveMode)
     Builder.defineMacro("__ARM_FEATURE_SVE", "1");
 
-  if ((FPU & NeonMode) && (FPU & SveMode))
-    Builder.defineMacro("__ARM_NEON_SVE_BRIDGE", "1");
-
   if (HasSVE2)
     Builder.defineMacro("__ARM_FEATURE_SVE2", "1");
 

clang/test/Preprocessor/aarch64-target-features.c

@@ -39,6 +39,7 @@
 // CHECK-NOT: __ARM_FP_FAST 1
 // CHECK: __ARM_NEON 1
 // CHECK: __ARM_NEON_FP 0xE
+// CHECK: __ARM_NEON_SVE_BRIDGE 1
 // CHECK: __ARM_PCS_AAPCS64 1
 // CHECK-NOT: __ARM_PCS 1
 // CHECK-NOT: __ARM_PCS_VFP 1

clang/test/Preprocessor/init-aarch64.c

@@ -30,6 +30,7 @@
 // AARCH64-NEXT: #define __ARM_FP 0xE
 // AARCH64-NEXT: #define __ARM_FP16_ARGS 1
 // AARCH64-NEXT: #define __ARM_FP16_FORMAT_IEEE 1
+// AARCH64-NEXT: #define __ARM_NEON_SVE_BRIDGE 1
 // AARCH64-NEXT: #define __ARM_PCS_AAPCS64 1
 // AARCH64-NEXT: #define __ARM_SIZEOF_MINIMAL_ENUM 4
 // AARCH64-NEXT: #define __ARM_SIZEOF_WCHAR_T 4

clang/test/Sema/aarch64-sve-intrinsics/acle_neon_sve_bridge.cpp

@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu  -verify -emit-llvm -o - %s
+// REQUIRES: aarch64-registered-target
+
+// Test that we can use __ARM_NEON_SVE_BRIDGE to guard to inclusion of arm_neon_sve_bridge.h,
+// and use the associated intrinsics via a target() attribute.
+
+// expected-no-diagnostics
+
+#ifdef __ARM_NEON_SVE_BRIDGE
+#include <arm_neon_sve_bridge.h>
+#endif
+
+uint32x4_t __attribute__((target("+sve"))) foo(svuint32_t a) {
+    return svget_neonq_u32(a);
+}