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[AArch64] Update the scheduling model for Cortex-X1/2/3/4 #118826

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Merged
merged 1 commit into from
Dec 6, 2024
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[AArch64] Update the scheduling model for Cortex-X1/2/3/4 #118826

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10 changes: 5 additions & 5 deletions llvm/lib/Target/AArch64/AArch64Processors.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1113,15 +1113,15 @@ def : ProcessorModel<"cortex-r82", CortexA55Model, ProcessorFeatures.R82,
[TuneR82]>;
def : ProcessorModel<"cortex-r82ae", CortexA55Model, ProcessorFeatures.R82AE,
[TuneR82AE]>;
def : ProcessorModel<"cortex-x1", CortexA57Model, ProcessorFeatures.X1,
def : ProcessorModel<"cortex-x1", NeoverseV1Model, ProcessorFeatures.X1,
[TuneX1]>;
def : ProcessorModel<"cortex-x1c", CortexA57Model, ProcessorFeatures.X1C,
def : ProcessorModel<"cortex-x1c", NeoverseV1Model, ProcessorFeatures.X1C,
[TuneX1]>;
def : ProcessorModel<"cortex-x2", NeoverseN2Model, ProcessorFeatures.X2,
def : ProcessorModel<"cortex-x2", NeoverseV2Model, ProcessorFeatures.X2,
[TuneX2]>;
def : ProcessorModel<"cortex-x3", NeoverseN2Model, ProcessorFeatures.X3,
def : ProcessorModel<"cortex-x3", NeoverseV2Model, ProcessorFeatures.X3,
[TuneX3]>;
def : ProcessorModel<"cortex-x4", NeoverseN2Model, ProcessorFeatures.X4,
def : ProcessorModel<"cortex-x4", NeoverseV2Model, ProcessorFeatures.X4,
[TuneX4]>;
def : ProcessorModel<"cortex-x925", NeoverseV2Model, ProcessorFeatures.X925,
[TuneX925]>;
Expand Down
45 changes: 45 additions & 0 deletions llvm/test/tools/llvm-mca/AArch64/Cortex/X1-neon-instructions.s
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@@ -0,0 +1,45 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-x1 -instruction-tables < %s | FileCheck %s

# Check the Neoverse V1 model is used.

add v0.16b, v1.16b, v31.16b

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 2 0.25 add v0.16b, v1.16b, v31.16b

# CHECK: Resources:
# CHECK-NEXT: [0.0] - V1UnitB
# CHECK-NEXT: [0.1] - V1UnitB
# CHECK-NEXT: [1.0] - V1UnitD
# CHECK-NEXT: [1.1] - V1UnitD
# CHECK-NEXT: [2.0] - V1UnitFlg
# CHECK-NEXT: [2.1] - V1UnitFlg
# CHECK-NEXT: [2.2] - V1UnitFlg
# CHECK-NEXT: [3] - V1UnitL2
# CHECK-NEXT: [4.0] - V1UnitL01
# CHECK-NEXT: [4.1] - V1UnitL01
# CHECK-NEXT: [5] - V1UnitM0
# CHECK-NEXT: [6] - V1UnitM1
# CHECK-NEXT: [7.0] - V1UnitS
# CHECK-NEXT: [7.1] - V1UnitS
# CHECK-NEXT: [8] - V1UnitV0
# CHECK-NEXT: [9] - V1UnitV1
# CHECK-NEXT: [10] - V1UnitV2
# CHECK-NEXT: [11] - V1UnitV3

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7.0] [7.1] [8] [9] [10] [11]
# CHECK-NEXT: - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7.0] [7.1] [8] [9] [10] [11] Instructions:
# CHECK-NEXT: - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 add v0.16b, v1.16b, v31.16b
45 changes: 26 additions & 19 deletions llvm/test/tools/llvm-mca/AArch64/Cortex/X2-sve-instructions.s
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@@ -1,7 +1,7 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-x2 -instruction-tables < %s | FileCheck %s

# Check the Neoverse N2 model is used.
# Check the Neoverse V2 model is used.

addhnb z0.b, z1.h, z31.h

Expand All @@ -14,27 +14,34 @@ addhnb z0.b, z1.h, z31.h
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 2 0.50 addhnb z0.b, z1.h, z31.h
# CHECK-NEXT: 1 2 0.25 addhnb z0.b, z1.h, z31.h

# CHECK: Resources:
# CHECK-NEXT: [0.0] - N2UnitB
# CHECK-NEXT: [0.1] - N2UnitB
# CHECK-NEXT: [1.0] - N2UnitD
# CHECK-NEXT: [1.1] - N2UnitD
# CHECK-NEXT: [2] - N2UnitL2
# CHECK-NEXT: [3.0] - N2UnitL01
# CHECK-NEXT: [3.1] - N2UnitL01
# CHECK-NEXT: [4] - N2UnitM0
# CHECK-NEXT: [5] - N2UnitM1
# CHECK-NEXT: [6.0] - N2UnitS
# CHECK-NEXT: [6.1] - N2UnitS
# CHECK-NEXT: [7] - N2UnitV0
# CHECK-NEXT: [8] - N2UnitV1
# CHECK-NEXT: [0.0] - V2UnitB
# CHECK-NEXT: [0.1] - V2UnitB
# CHECK-NEXT: [1.0] - V2UnitD
# CHECK-NEXT: [1.1] - V2UnitD
# CHECK-NEXT: [2.0] - V2UnitFlg
# CHECK-NEXT: [2.1] - V2UnitFlg
# CHECK-NEXT: [2.2] - V2UnitFlg
# CHECK-NEXT: [3] - V2UnitL2
# CHECK-NEXT: [4.0] - V2UnitL01
# CHECK-NEXT: [4.1] - V2UnitL01
# CHECK-NEXT: [5] - V2UnitM0
# CHECK-NEXT: [6] - V2UnitM1
# CHECK-NEXT: [7] - V2UnitS0
# CHECK-NEXT: [8] - V2UnitS1
# CHECK-NEXT: [9] - V2UnitS2
# CHECK-NEXT: [10] - V2UnitS3
# CHECK-NEXT: [11] - V2UnitV0
# CHECK-NEXT: [12] - V2UnitV1
# CHECK-NEXT: [13] - V2UnitV2
# CHECK-NEXT: [14] - V2UnitV3

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2] [3.0] [3.1] [4] [5] [6.0] [6.1] [7] [8]
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2] [3.0] [3.1] [4] [5] [6.0] [6.1] [7] [8] Instructions:
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 addhnb z0.b, z1.h, z31.h
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] Instructions:
# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhnb z0.b, z1.h, z31.h
47 changes: 47 additions & 0 deletions llvm/test/tools/llvm-mca/AArch64/Cortex/X3-sve-instructions.s
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@@ -0,0 +1,47 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-x3 -instruction-tables < %s | FileCheck %s

# Check the Neoverse V2 model is used.

addhnb z0.b, z1.h, z31.h

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 2 0.25 addhnb z0.b, z1.h, z31.h

# CHECK: Resources:
# CHECK-NEXT: [0.0] - V2UnitB
# CHECK-NEXT: [0.1] - V2UnitB
# CHECK-NEXT: [1.0] - V2UnitD
# CHECK-NEXT: [1.1] - V2UnitD
# CHECK-NEXT: [2.0] - V2UnitFlg
# CHECK-NEXT: [2.1] - V2UnitFlg
# CHECK-NEXT: [2.2] - V2UnitFlg
# CHECK-NEXT: [3] - V2UnitL2
# CHECK-NEXT: [4.0] - V2UnitL01
# CHECK-NEXT: [4.1] - V2UnitL01
# CHECK-NEXT: [5] - V2UnitM0
# CHECK-NEXT: [6] - V2UnitM1
# CHECK-NEXT: [7] - V2UnitS0
# CHECK-NEXT: [8] - V2UnitS1
# CHECK-NEXT: [9] - V2UnitS2
# CHECK-NEXT: [10] - V2UnitS3
# CHECK-NEXT: [11] - V2UnitV0
# CHECK-NEXT: [12] - V2UnitV1
# CHECK-NEXT: [13] - V2UnitV2
# CHECK-NEXT: [14] - V2UnitV3

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] Instructions:
# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhnb z0.b, z1.h, z31.h
47 changes: 47 additions & 0 deletions llvm/test/tools/llvm-mca/AArch64/Cortex/X4-sve-instructions.s
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@@ -0,0 +1,47 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-x4 -instruction-tables < %s | FileCheck %s

# Check the Neoverse V2 model is used.

addhnb z0.b, z1.h, z31.h

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 2 0.25 addhnb z0.b, z1.h, z31.h

# CHECK: Resources:
# CHECK-NEXT: [0.0] - V2UnitB
# CHECK-NEXT: [0.1] - V2UnitB
# CHECK-NEXT: [1.0] - V2UnitD
# CHECK-NEXT: [1.1] - V2UnitD
# CHECK-NEXT: [2.0] - V2UnitFlg
# CHECK-NEXT: [2.1] - V2UnitFlg
# CHECK-NEXT: [2.2] - V2UnitFlg
# CHECK-NEXT: [3] - V2UnitL2
# CHECK-NEXT: [4.0] - V2UnitL01
# CHECK-NEXT: [4.1] - V2UnitL01
# CHECK-NEXT: [5] - V2UnitM0
# CHECK-NEXT: [6] - V2UnitM1
# CHECK-NEXT: [7] - V2UnitS0
# CHECK-NEXT: [8] - V2UnitS1
# CHECK-NEXT: [9] - V2UnitS2
# CHECK-NEXT: [10] - V2UnitS3
# CHECK-NEXT: [11] - V2UnitV0
# CHECK-NEXT: [12] - V2UnitV1
# CHECK-NEXT: [13] - V2UnitV2
# CHECK-NEXT: [14] - V2UnitV3

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1.0] [1.1] [2.0] [2.1] [2.2] [3] [4.0] [4.1] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] Instructions:
# CHECK-NEXT: - - - - - - - - - - - - - - - - 0.25 0.25 0.25 0.25 addhnb z0.b, z1.h, z31.h
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