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[RISCV] Fix the cost of llvm.vector.reduce.and
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[RISCV] Fix the cost of llvm.vector.reduce.and
sunshaoce 0a55282
fixup! Addressed comments.
sunshaoce 493f56c
fixup! Combine formulas of NumOfVMAND
sunshaoce 5f4adaf
fixup! Clarify the cost calculation logic
sunshaoce 9b59bb9
fixup! remove CodeGen/RISCV/rvv/reduce-and-i1.ll
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Original file line number | Diff line number | Diff line change |
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5 | ||
; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zvl128b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL128B | ||
; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zvl128b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL128B | ||
; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zvl256b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL256B | ||
; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zvl256b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL256B | ||
; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zvl512b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL512B | ||
; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zvl512b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL512B | ||
; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+zvl1024b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL1024B | ||
; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+zvl1024b -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output \ | ||
; RUN: | FileCheck %s --check-prefixes=THROUGHPUT,THROUGHPUT-VL1024B | ||
|
||
define zeroext i1 @vreduce_and_v1i1(<1 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v1i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %red = call i1 @llvm.vector.reduce.and.v1i1(<1 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v1i1(<1 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v2i1(<2 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v2i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v2i1(<2 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v2i1(<2 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v4i1(<4 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v4i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v8i1(<8 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v8i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v16i1(<16 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v16i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v16i1(<16 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v16i1(<16 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v32i1(<32 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v32i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v32i1(<32 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v32i1(<32 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v64i1(<64 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v64i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v64i1(<64 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v64i1(<64 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v128i1(<128 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v128i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v128i1(<128 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v128i1(<128 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v256i1(<256 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_v256i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v256i1(<256 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v256i1(<256 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v512i1(<512 x i1> %v) { | ||
; THROUGHPUT-VL128B-LABEL: 'vreduce_and_v512i1' | ||
; THROUGHPUT-VL128B-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %red = call i1 @llvm.vector.reduce.and.v512i1(<512 x i1> %v) | ||
; THROUGHPUT-VL128B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
; THROUGHPUT-VL256B-LABEL: 'vreduce_and_v512i1' | ||
; THROUGHPUT-VL256B-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v512i1(<512 x i1> %v) | ||
; THROUGHPUT-VL256B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
; THROUGHPUT-VL512B-LABEL: 'vreduce_and_v512i1' | ||
; THROUGHPUT-VL512B-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v512i1(<512 x i1> %v) | ||
; THROUGHPUT-VL512B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
; THROUGHPUT-VL1024B-LABEL: 'vreduce_and_v512i1' | ||
; THROUGHPUT-VL1024B-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v512i1(<512 x i1> %v) | ||
; THROUGHPUT-VL1024B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v512i1(<512 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_v1024i1(<1024 x i1> %v) { | ||
; THROUGHPUT-VL128B-LABEL: 'vreduce_and_v1024i1' | ||
; THROUGHPUT-VL128B-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %red = call i1 @llvm.vector.reduce.and.v1024i1(<1024 x i1> %v) | ||
; THROUGHPUT-VL128B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
; THROUGHPUT-VL256B-LABEL: 'vreduce_and_v1024i1' | ||
; THROUGHPUT-VL256B-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %red = call i1 @llvm.vector.reduce.and.v1024i1(<1024 x i1> %v) | ||
; THROUGHPUT-VL256B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
; THROUGHPUT-VL512B-LABEL: 'vreduce_and_v1024i1' | ||
; THROUGHPUT-VL512B-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v1024i1(<1024 x i1> %v) | ||
; THROUGHPUT-VL512B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
; THROUGHPUT-VL1024B-LABEL: 'vreduce_and_v1024i1' | ||
; THROUGHPUT-VL1024B-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.v1024i1(<1024 x i1> %v) | ||
; THROUGHPUT-VL1024B-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.v1024i1(<1024 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv1i1(<vscale x 1 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv1i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv1i1(<vscale x 1 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv1i1(<vscale x 1 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv2i1(<vscale x 2 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv2i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv2i1(<vscale x 2 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv2i1(<vscale x 2 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv4i1(<vscale x 4 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv4i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv4i1(<vscale x 4 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv4i1(<vscale x 4 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv8i1(<vscale x 8 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv8i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv8i1(<vscale x 8 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv8i1(<vscale x 8 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv16i1(<vscale x 16 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv16i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv16i1(<vscale x 16 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv16i1(<vscale x 16 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv32i1(<vscale x 32 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv32i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv32i1(<vscale x 32 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv32i1(<vscale x 32 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv64i1(<vscale x 64 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv64i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv64i1(<vscale x 64 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv64i1(<vscale x 64 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv128i1(<vscale x 128 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv128i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv128i1(<vscale x 128 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv128i1(<vscale x 128 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv256i1(<vscale x 256 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv256i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv256i1(<vscale x 256 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv256i1(<vscale x 256 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv512i1(<vscale x 512 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv512i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv512i1(<vscale x 512 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv512i1(<vscale x 512 x i1> %v) | ||
ret i1 %red | ||
} | ||
|
||
define zeroext i1 @vreduce_and_nxv1024i1(<vscale x 1024 x i1> %v) { | ||
; THROUGHPUT-LABEL: 'vreduce_and_nxv1024i1' | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %red = call i1 @llvm.vector.reduce.and.nxv1024i1(<vscale x 1024 x i1> %v) | ||
; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %red | ||
; | ||
%red = call i1 @llvm.vector.reduce.and.nxv1024i1(<vscale x 1024 x i1> %v) | ||
ret i1 %red | ||
} |
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How much overlap is there between this test and llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll and llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
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The functions in
CostModel/RISCV/reduce-and-i1.ll
andCodeGen/RISCV/rvv/reduce-and-i1.ll
are consistent, and they indeed overlap withCodeGen/RISCV/rvv/vreductions-mask.ll
andCodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
.CodeGen/RISCV/rvv/reduce-and-i1.ll
should be removed.I think
CostModel/RISCV/reduce-and-i1.ll
should be kept, as it only overlaps withCostModel/RISCV/reduce-and.ll
in a small portion.Uh oh!
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By the way,
CodeGen/RISCV/rvv/vreductions-mask.ll
andCodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
only test the default VLEN. Should different VLENs be added?