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[GISel] Avoid creating a virtual register we don't need. #119305

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Merged
merged 1 commit into from
Dec 10, 2024

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topperc
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@topperc topperc commented Dec 10, 2024

narrowScalarAddSub was creating a virtual register and then overwriting the Register variable without using it. Add an else and only create it when needed.

narrowScalarAddSub was creating a virtual register and then overwriting
the Register variable without using it. Add an else and only create it
when needed.
@llvmbot
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llvmbot commented Dec 10, 2024

@llvm/pr-subscribers-llvm-globalisel

Author: Craig Topper (topperc)

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narrowScalarAddSub was creating a virtual register and then overwriting the Register variable without using it. Add an else and only create it when needed.


Full diff: https://github.com/llvm/llvm-project/pull/119305.diff

1 Files Affected:

  • (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+3-1)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index cf835ad187f818..5bfeee05a19c0d 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -6406,10 +6406,12 @@ LegalizerHelper::narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx,
   for (int i = 0, e = Src1Regs.size(); i != e; ++i) {
     Register DstReg =
         MRI.createGenericVirtualRegister(MRI.getType(Src1Regs[i]));
-    Register CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1));
+    Register CarryOut;
     // Forward the final carry-out to the destination register
     if (i == e - 1 && CarryDst)
       CarryOut = CarryDst;
+    else
+      CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1));
 
     if (!CarryIn) {
       MIRBuilder.buildInstr(OpO, {DstReg, CarryOut},

@topperc topperc merged commit 7c12418 into llvm:main Dec 10, 2024
10 checks passed
@topperc topperc deleted the pr/unnecessary-reg branch December 10, 2024 04:23
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3 participants