NFC: Move RegAlloc headers to include dir

llvm/lib/CodeGen/InterferenceCache.h → llvm/include/llvm/CodeGen/InterferenceCache.h

@@ -142,7 +142,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
 
   // Point to an entry for each physreg. The entry pointed to may not be up to
   // date, and it may have been reused for a different physreg.
-  unsigned char* PhysRegEntries = nullptr;
+  unsigned char *PhysRegEntries = nullptr;
   size_t PhysRegEntriesCount = 0;
 
   // Next round-robin entry to be picked.
@@ -158,9 +158,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
   InterferenceCache() = default;
   InterferenceCache &operator=(const InterferenceCache &other) = delete;
   InterferenceCache(const InterferenceCache &other) = delete;
-  ~InterferenceCache() {
-    free(PhysRegEntries);
-  }
+  ~InterferenceCache() { free(PhysRegEntries); }
 
   void reinitPhysRegEntries();
 
@@ -194,9 +192,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
     /// Cursor - Create a dangling cursor.
     Cursor() = default;
 
-    Cursor(const Cursor &O) {
-      setEntry(O.CacheEntry);
-    }
+    Cursor(const Cursor &O) { setEntry(O.CacheEntry); }
 
     Cursor &operator=(const Cursor &O) {
       setEntry(O.CacheEntry);
@@ -220,21 +216,15 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
     }
 
     /// hasInterference - Return true if the current block has any interference.
-    bool hasInterference() {
-      return Current->First.isValid();
-    }
+    bool hasInterference() { return Current->First.isValid(); }
 
     /// first - Return the starting index of the first interfering range in the
     /// current block.
-    SlotIndex first() {
-      return Current->First;
-    }
+    SlotIndex first() { return Current->First; }
 
     /// last - Return the ending index of the last interfering range in the
     /// current block.
-    SlotIndex last() {
-      return Current->Last;
-    }
+    SlotIndex last() { return Current->Last; }
   };
 };
 

llvm/lib/CodeGen/RegAllocBase.h → llvm/include/llvm/CodeGen/RegAllocBase.h

@@ -48,7 +48,7 @@ class LiveIntervals;
 class LiveRegMatrix;
 class MachineInstr;
 class MachineRegisterInfo;
-template<typename T> class SmallVectorImpl;
+template <typename T> class SmallVectorImpl;
 class Spiller;
 class TargetRegisterInfo;
 class VirtRegMap;

llvm/lib/CodeGen/SplitKit.h → llvm/include/llvm/CodeGen/SplitKit.h

@@ -88,7 +88,6 @@ class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
     }
     return Res;
   }
-
 };
 
 /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
@@ -387,7 +386,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
 
   /// removeBackCopies - Remove the copy instructions that defines the values
   /// in the vector in the complement interval.
-  void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
+  void removeBackCopies(SmallVectorImpl<VNInfo *> &Copies);
 
   /// getShallowDominator - Returns the least busy dominator of MBB that is
   /// also dominated by DefMBB.  Busy is measured by loop depth.
@@ -430,8 +429,9 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
   /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
   /// necessary to construct a sequence of copies to cover it exactly.
   SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
-      MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
-      bool Late, unsigned RegIdx);
+                      MachineBasicBlock &MBB,
+                      MachineBasicBlock::iterator InsertBefore, bool Late,
+                      unsigned RegIdx);
 
   SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
                                   MachineBasicBlock &MB,
@@ -448,7 +448,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
               VirtRegAuxInfo &VRAI);
 
   /// reset - Prepare for a new split.
-  void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
+  void reset(LiveRangeEdit &, ComplementSpillMode = SM_Partition);
 
   /// Create a new virtual register and live interval.
   /// Return the interval index, starting from 1. Interval index 0 is the
@@ -533,9 +533,9 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
   /// @param LeaveBefore When set, leave IntvIn before this point.
   /// @param IntvOut     Interval index leaving the block.
   /// @param EnterAfter  When set, enter IntvOut after this point.
-  void splitLiveThroughBlock(unsigned MBBNum,
-                             unsigned IntvIn, SlotIndex LeaveBefore,
-                             unsigned IntvOut, SlotIndex EnterAfter);
+  void splitLiveThroughBlock(unsigned MBBNum, unsigned IntvIn,
+                             SlotIndex LeaveBefore, unsigned IntvOut,
+                             SlotIndex EnterAfter);
 
   /// splitRegInBlock - Split CurLI in the given block such that it enters the
   /// block in IntvIn and leaves it on the stack (or not at all). Split points
@@ -545,8 +545,8 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
   /// @param BI          Block descriptor.
   /// @param IntvIn      Interval index entering the block. Not 0.
   /// @param LeaveBefore When set, leave IntvIn before this point.
-  void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
-                       unsigned IntvIn, SlotIndex LeaveBefore);
+  void splitRegInBlock(const SplitAnalysis::BlockInfo &BI, unsigned IntvIn,
+                       SlotIndex LeaveBefore);
 
   /// splitRegOutBlock - Split CurLI in the given block such that it enters the
   /// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
@@ -557,8 +557,8 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
   /// @param BI          Block descriptor.
   /// @param IntvOut     Interval index leaving the block.
   /// @param EnterAfter  When set, enter IntvOut after this point.
-  void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
-                        unsigned IntvOut, SlotIndex EnterAfter);
+  void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI, unsigned IntvOut,
+                        SlotIndex EnterAfter);
 };
 
 } // end namespace llvm

llvm/lib/CodeGen/InlineSpiller.cpp

@@ -11,7 +11,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "SplitKit.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/MapVector.h"
@@ -36,6 +35,7 @@
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SlotIndexes.h"
 #include "llvm/CodeGen/Spiller.h"
+#include "llvm/CodeGen/SplitKit.h"
 #include "llvm/CodeGen/StackMaps.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetOpcodes.h"

llvm/lib/CodeGen/InterferenceCache.cpp

@@ -10,7 +10,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "InterferenceCache.h"
+#include "llvm/CodeGen/InterferenceCache.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"

llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp

@@ -11,11 +11,11 @@
 //===----------------------------------------------------------------------===//
 
 #include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
 #include "llvm/Analysis/InteractiveModelRunner.h"
 #include "llvm/Analysis/MLModelRunner.h"
 #include "llvm/Analysis/TensorSpec.h"
 #include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
 #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL) || defined(LLVM_HAVE_TFLITE)
 #include "llvm/Analysis/ModelUnderTrainingRunner.h"
 #include "llvm/Analysis/NoInferenceModelRunner.h"

llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp

@@ -11,7 +11,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/InteractiveModelRunner.h"
 #include "llvm/Analysis/MLModelRunner.h"
@@ -24,6 +23,7 @@
 #include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
 #include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
 #include "llvm/CodeGen/RegisterClassInfo.h"
 #include "llvm/CodeGen/SlotIndexes.h"

llvm/lib/CodeGen/RegAllocBase.cpp

@@ -11,7 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "RegAllocBase.h"
+#include "llvm/CodeGen/RegAllocBase.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/LiveInterval.h"

llvm/lib/CodeGen/RegAllocBasic.cpp

@@ -12,7 +12,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "AllocationOrder.h"
-#include "RegAllocBase.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/ProfileSummaryInfo.h"
 #include "llvm/CodeGen/CalcSpillWeights.h"
@@ -26,6 +25,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocBase.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/CodeGen/Spiller.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"

llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp

@@ -11,11 +11,11 @@
 //===----------------------------------------------------------------------===//
 #include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
 #include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
 #include "llvm/CodeGen/LiveRegMatrix.h"
 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
 #include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
 #include "llvm/CodeGen/RegisterClassInfo.h"
 #include "llvm/CodeGen/VirtRegMap.h"

llvm/lib/CodeGen/RegAllocGreedy.cpp

@@ -11,11 +11,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "RegAllocGreedy.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
 #include "AllocationOrder.h"
-#include "InterferenceCache.h"
-#include "RegAllocBase.h"
-#include "SplitKit.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/IndexedMap.h"
@@ -26,6 +23,7 @@
 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
 #include "llvm/CodeGen/CalcSpillWeights.h"
 #include "llvm/CodeGen/EdgeBundles.h"
+#include "llvm/CodeGen/InterferenceCache.h"
 #include "llvm/CodeGen/LiveDebugVariables.h"
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervalUnion.h"
@@ -44,13 +42,15 @@
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/RegAllocBase.h"
 #include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
 #include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/CodeGen/RegisterClassInfo.h"
 #include "llvm/CodeGen/SlotIndexes.h"
 #include "llvm/CodeGen/SpillPlacement.h"
 #include "llvm/CodeGen/Spiller.h"
+#include "llvm/CodeGen/SplitKit.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"

llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp

@@ -11,8 +11,8 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
-#include "RegAllocGreedy.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
 #include "llvm/CodeGen/VirtRegMap.h"
 #include "llvm/IR/Module.h"
 #include "llvm/InitializePasses.h"

llvm/lib/CodeGen/SplitKit.cpp

@@ -11,7 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "SplitKit.h"
+#include "llvm/CodeGen/SplitKit.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/LiveRangeEdit.h"