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[InstSimplify] Remove most of undef handling logic #119884

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30 changes: 8 additions & 22 deletions llvm/lib/Analysis/InstructionSimplify.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -748,11 +748,6 @@ static Value *simplifySubInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW,
if (isa<PoisonValue>(Op0) || isa<PoisonValue>(Op1))
return PoisonValue::get(Op0->getType());

// X - undef -> undef
// undef - X -> undef
if (Q.isUndefValue(Op0) || Q.isUndefValue(Op1))
return UndefValue::get(Op0->getType());

// X - 0 -> X
if (match(Op1, m_Zero()))
return Op0;
Expand Down Expand Up @@ -5002,10 +4997,6 @@ static Value *simplifyGEPInst(Type *SrcTy, Value *Ptr,
any_of(Indices, [](const auto *V) { return isa<PoisonValue>(V); }))
return PoisonValue::get(GEPTy);

// getelementptr undef, idx -> undef
if (Q.isUndefValue(Ptr))
return UndefValue::get(GEPTy);

bool IsScalableVec =
SrcTy->isScalableTy() || any_of(Indices, [](const Value *V) {
return isa<ScalableVectorType>(V->getType());
Expand Down Expand Up @@ -5223,13 +5214,13 @@ static Value *simplifyExtractElementInst(Value *Vec, Value *Idx,
if (auto *CIdx = dyn_cast<Constant>(Idx))
return ConstantExpr::getExtractElement(CVec, CIdx);

if (Q.isUndefValue(Vec))
return UndefValue::get(VecVTy->getElementType());
if (isa<PoisonValue>(Vec))
return PoisonValue::get(VecVTy->getElementType());
}

// An undef extract index can be arbitrarily chosen to be an out-of-range
// A poison extract index can be arbitrarily chosen to be an out-of-range
// index value, which would result in the instruction being poison.
if (Q.isUndefValue(Idx))
if (isa<PoisonValue>(Idx))
return PoisonValue::get(VecVTy->getElementType());

// If extracting a specified index from the vector, see if we can recursively
Expand Down Expand Up @@ -6673,8 +6664,6 @@ Value *llvm::simplifyBinaryIntrinsic(Intrinsic::ID IID, Type *ReturnType,
return ConstantInt::get(ReturnType, true);
if ((Mask & fcAllFlags) == 0)
return ConstantInt::get(ReturnType, false);
if (Q.isUndefValue(Op0))
return UndefValue::get(ReturnType);
break;
}
case Intrinsic::maxnum:
Expand Down Expand Up @@ -6799,13 +6788,10 @@ static Value *simplifyIntrinsic(CallBase *Call, Value *Callee,
case Intrinsic::fshr: {
Value *Op0 = Args[0], *Op1 = Args[1], *ShAmtArg = Args[2];

// If both operands are undef, the result is undef.
if (Q.isUndefValue(Op0) && Q.isUndefValue(Op1))
return UndefValue::get(F->getReturnType());

// If shift amount is undef, assume it is zero.
if (Q.isUndefValue(ShAmtArg))
return Args[IID == Intrinsic::fshl ? 0 : 1];
// If any of the operands is poison, the result is poison.
if (isa<PoisonValue>(Op0) || isa<PoisonValue>(Op1) ||
isa<PoisonValue>(ShAmtArg))
return PoisonValue::get(F->getReturnType());

const APInt *ShAmtC;
if (match(ShAmtArg, m_APInt(ShAmtC))) {
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
Original file line number Diff line number Diff line change
Expand Up @@ -154,7 +154,7 @@ define amdgpu_kernel void @nested_loop_conditions(ptr addrspace(1) nocapture %ar
; GCN-NEXT: v_cmp_lt_i32_e32 vcc, 8, v0
; GCN-NEXT: s_cbranch_vccnz .LBB1_6
; GCN-NEXT: ; %bb.1: ; %bb14.lr.ph
; GCN-NEXT: s_load_dword s4, s[0:1], 0x0
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x0
; GCN-NEXT: s_branch .LBB1_3
; GCN-NEXT: .LBB1_2: ; %Flow
; GCN-NEXT: ; in Loop: Header=BB1_3 Depth=1
Expand All @@ -179,7 +179,7 @@ define amdgpu_kernel void @nested_loop_conditions(ptr addrspace(1) nocapture %ar
; GCN-NEXT: s_cbranch_vccnz .LBB1_4
; GCN-NEXT: ; %bb.5: ; %bb21
; GCN-NEXT: ; in Loop: Header=BB1_3 Depth=1
; GCN-NEXT: s_load_dword s4, s[0:1], 0x0
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x0
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_cmp_lt_i32_e64 s[0:1], 8, v0
Expand Down
50 changes: 26 additions & 24 deletions llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ define double @test_constant_fold_rcp_f64_43() nounwind {

define float @test_constant_fold_rcp_f32_43_strictfp() nounwind strictfp {
; CHECK-LABEL: @test_constant_fold_rcp_f32_43_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #[[ATTR14:[0-9]+]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #[[ATTR15:[0-9]+]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) strictfp nounwind readnone
Expand Down Expand Up @@ -115,7 +115,7 @@ define half @test_constant_fold_sqrt_f16_0() nounwind {

define float @test_constant_fold_sqrt_f32_0() nounwind {
; CHECK-LABEL: @test_constant_fold_sqrt_f32_0(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float 0.000000e+00) #[[ATTR15:[0-9]+]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float 0.000000e+00) #[[ATTR16:[0-9]+]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.sqrt.f32(float 0.0) nounwind readnone
Expand All @@ -124,7 +124,7 @@ define float @test_constant_fold_sqrt_f32_0() nounwind {

define double @test_constant_fold_sqrt_f64_0() nounwind {
; CHECK-LABEL: @test_constant_fold_sqrt_f64_0(
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double 0.000000e+00) #[[ATTR15]]
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double 0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: ret double [[VAL]]
;
%val = call double @llvm.amdgcn.sqrt.f64(double 0.0) nounwind readnone
Expand All @@ -141,7 +141,7 @@ define half @test_constant_fold_sqrt_f16_neg0() nounwind {

define float @test_constant_fold_sqrt_f32_neg0() nounwind {
; CHECK-LABEL: @test_constant_fold_sqrt_f32_neg0(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float -0.000000e+00) #[[ATTR15]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float -0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.sqrt.f32(float -0.0) nounwind readnone
Expand All @@ -150,7 +150,7 @@ define float @test_constant_fold_sqrt_f32_neg0() nounwind {

define double @test_constant_fold_sqrt_f64_neg0() nounwind {
; CHECK-LABEL: @test_constant_fold_sqrt_f64_neg0(
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double -0.000000e+00) #[[ATTR15]]
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double -0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: ret double [[VAL]]
;
%val = call double @llvm.amdgcn.sqrt.f64(double -0.0) nounwind readnone
Expand Down Expand Up @@ -667,7 +667,7 @@ define i1 @test_class_undef_full_mask_f32() nounwind {

define i1 @test_class_undef_val_f32() nounwind {
; CHECK-LABEL: @test_class_undef_val_f32(
; CHECK-NEXT: ret i1 undef
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 4)
ret i1 %val
Expand Down Expand Up @@ -718,7 +718,7 @@ define i1 @test_class_isnan_f32(float %x) nounwind {

define i1 @test_class_isnan_f32_strict(float %x) nounwind strictfp {
; CHECK-LABEL: @test_class_isnan_f32_strict(
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR16:[0-9]+]]
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR17:[0-9]+]]
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 3) strictfp
Expand All @@ -736,7 +736,7 @@ define i1 @test_class_is_p0_n0_f32(float %x) nounwind {

define i1 @test_class_is_p0_n0_f32_strict(float %x) nounwind strictfp {
; CHECK-LABEL: @test_class_is_p0_n0_f32_strict(
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR17]]
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 96) strictfp
Expand Down Expand Up @@ -2000,7 +2000,7 @@ define i64 @icmp_constant_inputs_false() {

define i64 @icmp_constant_inputs_true() {
; CHECK-LABEL: @icmp_constant_inputs_true(
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0:![0-9]+]]) #[[ATTR17:[0-9]+]]
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0:![0-9]+]]) #[[ATTR18:[0-9]+]]
; CHECK-NEXT: ret i64 [[RESULT]]
;
%result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 9, i32 8, i32 34)
Expand Down Expand Up @@ -2707,7 +2707,7 @@ define i64 @fcmp_constant_inputs_false() {

define i64 @fcmp_constant_inputs_true() {
; CHECK-LABEL: @fcmp_constant_inputs_true(
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0]]) #[[ATTR17]]
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0]]) #[[ATTR18]]
; CHECK-NEXT: ret i64 [[RESULT]]
;
%result = call i64 @llvm.amdgcn.fcmp.i64.f32(float 2.0, float 4.0, i32 4)
Expand Down Expand Up @@ -5829,7 +5829,7 @@ define double @trig_preop_constfold_neg32_segment() {

define double @trig_preop_constfold_strictfp() strictfp {
; CHECK-LABEL: @trig_preop_constfold_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) #[[ATTR17]]
; CHECK-NEXT: ret double [[VAL]]
;
%val = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) strictfp
Expand Down Expand Up @@ -6198,7 +6198,7 @@ define half @test_constant_fold_log_f16_neg10() {

define float @test_constant_fold_log_f32_qnan_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_log_f32_qnan_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) strictfp
Expand All @@ -6207,7 +6207,7 @@ define float @test_constant_fold_log_f32_qnan_strictfp() strictfp {

define float @test_constant_fold_log_f32_0_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_log_f32_0_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.log.f32(float 0.0) strictfp
Expand All @@ -6216,7 +6216,7 @@ define float @test_constant_fold_log_f32_0_strictfp() strictfp {

define float @test_constant_fold_log_f32_neg0_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_log_f32_neg0_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -0.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.log.f32(float -0.0) strictfp
Expand All @@ -6225,7 +6225,7 @@ define float @test_constant_fold_log_f32_neg0_strictfp() strictfp {

define float @test_constant_fold_log_f32_neg_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_log_f32_neg_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -1.000000e+01) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -1.000000e+01) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.log.f32(float -10.0) strictfp
Expand All @@ -6242,7 +6242,7 @@ define float @test_constant_fold_log_f32_pinf_strictfp() strictfp {

define float @test_constant_fold_log_f32_ninf_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_log_f32_ninf_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) strictfp
Expand Down Expand Up @@ -6444,7 +6444,7 @@ define half @test_constant_fold_exp2_f16_neg10() {

define float @test_constant_fold_exp2_f32_qnan_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_qnan_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) strictfp
Expand All @@ -6453,7 +6453,7 @@ define float @test_constant_fold_exp2_f32_qnan_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_0_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_0_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float 0.0) strictfp
Expand All @@ -6462,7 +6462,7 @@ define float @test_constant_fold_exp2_f32_0_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_neg0_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg0_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -0.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -0.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float -0.0) strictfp
Expand All @@ -6471,7 +6471,7 @@ define float @test_constant_fold_exp2_f32_neg0_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_1_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_1_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 1.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 1.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float 1.0) strictfp
Expand All @@ -6480,7 +6480,7 @@ define float @test_constant_fold_exp2_f32_1_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_neg1_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg1_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float -1.0) strictfp
Expand All @@ -6489,7 +6489,7 @@ define float @test_constant_fold_exp2_f32_neg1_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_2_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_2_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 2.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 2.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float 2.0) strictfp
Expand All @@ -6498,7 +6498,7 @@ define float @test_constant_fold_exp2_f32_2_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_neg2_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg2_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -2.000000e+00) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -2.000000e+00) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float -2.0) strictfp
Expand All @@ -6507,7 +6507,7 @@ define float @test_constant_fold_exp2_f32_neg2_strictfp() strictfp {

define float @test_constant_fold_exp2_f32_neg_strictfp() strictfp {
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg_strictfp(
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+01) #[[ATTR16]]
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+01) #[[ATTR17]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.amdgcn.exp2.f32(float -10.0) strictfp
Expand Down Expand Up @@ -6555,13 +6555,15 @@ declare i32 @llvm.amdgcn.prng.b32(i32)
define i32 @prng_undef_i32() {
; CHECK-LABEL: @prng_undef_i32(
; CHECK-NEXT: ret i32 undef
;
%prng = call i32 @llvm.amdgcn.prng.b32(i32 undef)
ret i32 %prng
}

define i32 @prng_poison_i32() {
; CHECK-LABEL: @prng_poison_i32(
; CHECK-NEXT: ret i32 poison
;
%prng = call i32 @llvm.amdgcn.prng.b32(i32 poison)
ret i32 %prng
}
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/is_fpclass.ll
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,7 @@ define i1 @test_class_poison_full_mask_f32() {

define i1 @test_class_undef_val_f32() {
; CHECK-LABEL: @test_class_undef_val_f32(
; CHECK-NEXT: ret i1 undef
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f32(float undef, i32 4)
ret i1 %val
Expand Down
5 changes: 4 additions & 1 deletion llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
Original file line number Diff line number Diff line change
Expand Up @@ -630,7 +630,10 @@ define <2 x ptr> @gep_all_lanes_undef(ptr %base, i64 %idx) {;

define ptr @gep_demanded_lane_undef(ptr %base, i64 %idx) {
; CHECK-LABEL: @gep_demanded_lane_undef(
; CHECK-NEXT: ret ptr undef
; CHECK-NEXT: [[IDXVEC:%.*]] = insertelement <2 x i64> poison, i64 [[IDX:%.*]], i64 1
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, <2 x ptr> <ptr poison, ptr undef>, <2 x i64> [[IDXVEC]]
; CHECK-NEXT: [[EE:%.*]] = extractelement <2 x ptr> [[GEP]], i64 1
; CHECK-NEXT: ret ptr [[EE]]
;
%basevec = insertelement <2 x ptr> undef, ptr %base, i32 0
%idxvec = insertelement <2 x i64> undef, i64 %idx, i32 1
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,8 @@ define i8 @test4(<8 x i8> %V) {

define i32 @test5(<4 x i32> %V) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: ret i32 poison
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 undef
; CHECK-NEXT: ret i32 [[EXTRACT]]
;
%extract = extractelement <4 x i32> %V, i32 undef
ret i32 %extract
Expand Down
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