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[MLIR][NVVM] Enable import of nvvm.barrier0 #119965

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Dec 17, 2024
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10 changes: 3 additions & 7 deletions mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Original file line number Diff line number Diff line change
Expand Up @@ -117,14 +117,13 @@ class NVVM_Attr<string attrName, string attrMnemonic, list<Trait> traits = []>
// NVVM intrinsic operations
//===----------------------------------------------------------------------===//

class NVVM_IntrOp<string mnem, list<Trait> traits,
int numResults>
class NVVM_IntrOp<string mnem, list<Trait> traits = [],
int numResults = 0>
: LLVM_IntrOpBase<NVVM_Dialect, mnem, "nvvm_" # !subst(".", "_", mnem),
/*list<int> overloadedResults=*/[],
/*list<int> overloadedOperands=*/[],
traits, numResults>;


//===----------------------------------------------------------------------===//
// NVVM special register op definitions
//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -431,10 +430,7 @@ def NVVM_MBarrierTestWaitSharedOp : NVVM_Op<"mbarrier.test.wait.shared">,
// NVVM synchronization op definitions
//===----------------------------------------------------------------------===//

def NVVM_Barrier0Op : NVVM_Op<"barrier0"> {
string llvmBuilder = [{
createIntrinsicCall(builder, llvm::Intrinsic::nvvm_barrier0);
}];
def NVVM_Barrier0Op : NVVM_IntrOp<"barrier0"> {
let assemblyFormat = "attr-dict";
}

Expand Down
13 changes: 8 additions & 5 deletions mlir/test/Target/LLVMIR/Import/nvvmir.ll
Original file line number Diff line number Diff line change
Expand Up @@ -71,12 +71,15 @@ define float @nvvm_rcp(float %0) {
ret float %2
}

; TODO: Support the intrinsics below once they derive from NVVM_IntrOp rather than from NVVM_Op.
; CHECK-LABEL: @llvm_nvvm_barrier0()
define void @llvm_nvvm_barrier0() {
; CHECK: nvvm.barrier0
call void @llvm.nvvm.barrier0()
ret void
}

; define void @llvm_nvvm_barrier0() {
; call void @llvm.nvvm.barrier0()
; ret void
; }

; TODO: Support the intrinsics below once they derive from NVVM_IntrOp rather than from NVVM_Op.
;
; define i32 @nvvm_shfl(i32 %0, i32 %1, i32 %2, i32 %3, float %4) {
; %6 = call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 %0, i32 %3, i32 %1, i32 %2)
Expand Down
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