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[RISCV] Add ISAInfoTest tests for a few XQCI extensions #120060

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Merged
merged 2 commits into from
Dec 16, 2024

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Missed out adding rv32 only support test checks for a few of the extensions.

Missed out adding rv32 only support test checks for a few of the
extensions.
@llvmbot
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llvmbot commented Dec 16, 2024

@llvm/pr-subscribers-backend-risc-v

Author: Sudharsan Veeravalli (svs-quic)

Changes

Missed out adding rv32 only support test checks for a few of the extensions.


Full diff: https://github.com/llvm/llvm-project/pull/120060.diff

1 Files Affected:

  • (modified) llvm/unittests/TargetParser/RISCVISAInfoTest.cpp (+15)
diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
index bef3f571b174d3..6bad23e1c2409e 100644
--- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
@@ -662,6 +662,21 @@ TEST(ParseArchString, RejectsConflictingExtensions) {
     EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
               "'xqcia' is only supported for 'rv32'");
   }
+
+  for (StringRef Input : {"rv64i_xqcicsr0p2"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'xqcicsr' is only supported for 'rv32'");
+  }
+
+  for (StringRef Input : {"rv64i_xqcilsm0p2"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'xqcilsm' is only supported for 'rv32'");
+  }
+
+  for (StringRef Input : {"rv64i_xqcics0p2"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'xqcics' is only supported for 'rv32'");
+  }
 }
 
 TEST(ParseArchString, MissingDepency) {

@svs-quic svs-quic requested review from el-sc and lenary and removed request for el-sc December 16, 2024 09:41
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LGTM, thanks!

@svs-quic svs-quic merged commit 5c5f669 into llvm:main Dec 16, 2024
8 checks passed
@svs-quic svs-quic deleted the isatest branch December 16, 2024 15:10
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3 participants