[RISCV] Add UnsupportedSchedZfhExceptForZfhmin for processors only support Zfhmin

[BoyaoWang430]

Zfhmin is required in rva23. Add UnsupportedSchedZfhExceptForZfhmin for processors only support Zfhmin.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: None (BoyaoWang430)

Changes

Zfhmin is required in rva23. Add UnsupportedSchedZfhExceptForZfhmin for processors only support Zfhmin.

---

Full diff: https://github.com/llvm/llvm-project/pull/120196.diff

1 Files Affected:

• (modified) llvm/lib/Target/RISCV/RISCVSchedule.td (+25)

diff --git a/llvm/lib/Target/RISCV/RISCVSchedule.td b/llvm/lib/Target/RISCV/RISCVSchedule.td
index 1fdbc7cbcbaf4a..ecd5329f5710fe 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedule.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedule.td
@@ -257,6 +257,31 @@ def : ReadAdvance<ReadFSqrt16, 0>;
 } // Unsupported = true
 }
 
+multiclass UnsupportedSchedZfhExceptForZfhmin {
+let Unsupported = true in {
+def : WriteRes<WriteFAdd16, []>;
+def : WriteRes<WriteFClass16, []>;
+def : WriteRes<WriteFDiv16, []>;
+def : WriteRes<WriteFCmp16, []>;
+def : WriteRes<WriteFMA16, []>;
+def : WriteRes<WriteFMinMax16, []>;
+def : WriteRes<WriteFMul16, []>;
+def : WriteRes<WriteFSGNJ16, []>;
+def : WriteRes<WriteFST16, []>;
+def : WriteRes<WriteFSqrt16, []>;
+
+def : ReadAdvance<ReadFAdd16, 0>;
+def : ReadAdvance<ReadFClass16, 0>;
+def : ReadAdvance<ReadFDiv16, 0>;
+def : ReadAdvance<ReadFCmp16, 0>;
+def : ReadAdvance<ReadFMA16, 0>;
+def : ReadAdvance<ReadFMinMax16, 0>;
+def : ReadAdvance<ReadFMul16, 0>;
+def : ReadAdvance<ReadFSGNJ16, 0>;
+def : ReadAdvance<ReadFSqrt16, 0>;
+} // Unsupported = true
+}
+
 multiclass UnsupportedSchedF {
 let Unsupported = true in {
 def : WriteRes<WriteFST32, []>;

[topperc]

We don't really like adding unused things to the repo. It's likely to get deleted because it doesn't look used.

[wangpc-pp]

Thanks for reminding!
Here I'd like to start the discussion: how should we handle the scheduling model of overlapped extensions like Zfhmin and Zfh? We know that only Zfhmin is mandatory in RVA23.
For current implementation, the scheduling model is not so fine-grained. For example, if we only support Zfhmin, then we don't need to define UnsupportedSchedZfh, but we still need to set Unsupported to true for arithmetic operations. And this is what we want to fix in this PR.