-
Notifications
You must be signed in to change notification settings - Fork 14.3k
[TableGen][GISel] Reuse importNodeRenderer
for OperandWithDefaultOps
#121285
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[TableGen][GISel] Reuse importNodeRenderer
for OperandWithDefaultOps
#121285
Conversation
@llvm/pr-subscribers-tablegen @llvm/pr-subscribers-llvm-globalisel Author: Sergei Barannikov (s-barannikov) ChangesThis avoids some code duplication (handling Depends on #121283. Full diff: https://github.com/llvm/llvm-project/pull/121285.diff 2 Files Affected:
diff --git a/llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td b/llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
new file mode 100644
index 00000000000000..a2ee3dc311772c
--- /dev/null
+++ b/llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
@@ -0,0 +1,24 @@
+// RUN: llvm-tblgen -gen-global-isel -I %p/../../../include -I %p/../Common %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+include "GlobalISelEmitterCommon.td"
+
+def undef_tied : OperandWithDefaultOps<untyped, (ops (i32 undef_tied_input))> {
+ let MIOperandInfo = (ops GPR32:$inactive);
+}
+
+let Constraints = "$opt.inactive = $rd" in
+def I1 : I<(outs GPR32:$rd), (ins GPR32:$rs, undef_tied:$opt),
+ [(set GPR32:$rd, (abs i32:$rs))]>;
+
+// CHECK-LABEL: // (abs:{ *:[i32] } i32:{ *:[i32] }:$rs) => (I1:{ *:[i32] } i32:{ *:[i32] }:$rs)
+// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
+// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::IMPLICIT_DEF),
+// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
+// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::I1),
+// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[rd]
+// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // rs
+// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
+// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,
+// CHECK-NEXT: // GIR_Coverage, 0,
+// CHECK-NEXT: GIR_EraseRootFromParent_Done,
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index f0fb11625883ea..9f244ca804a08c 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -418,7 +418,8 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
const TreePatternNode &N) const;
Error importLeafNodeRenderer(RuleMatcher &M, BuildMIAction &MIBuilder,
- const TreePatternNode &N) const;
+ const TreePatternNode &N,
+ action_iterator InsertPt) const;
Error importXFormNodeRenderer(RuleMatcher &M, BuildMIAction &MIBuilder,
const TreePatternNode &N) const;
@@ -431,9 +432,6 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
const TreePatternNode &N,
action_iterator &InsertPt) const;
- Error importDefaultOperandRenderers(action_iterator InsertPt, RuleMatcher &M,
- BuildMIAction &DstMIBuilder,
- const DAGDefaultOperand &DefaultOp) const;
Error importImplicitDefRenderers(BuildMIAction &DstMIBuilder,
ArrayRef<const Record *> ImplicitDefs) const;
@@ -1291,7 +1289,8 @@ Error GlobalISelEmitter::importNamedNodeRenderer(
// Equivalent of MatcherGen::EmitResultLeafAsOperand.
Error GlobalISelEmitter::importLeafNodeRenderer(
- RuleMatcher &M, BuildMIAction &MIBuilder, const TreePatternNode &N) const {
+ RuleMatcher &M, BuildMIAction &MIBuilder, const TreePatternNode &N,
+ action_iterator InsertPt) const {
if (const auto *II = dyn_cast<IntInit>(N.getLeafValue())) {
MIBuilder.addRenderer<ImmRenderer>(II->getValue());
return Error::success();
@@ -1300,11 +1299,24 @@ Error GlobalISelEmitter::importLeafNodeRenderer(
if (const auto *DI = dyn_cast<DefInit>(N.getLeafValue())) {
const Record *R = DI->getDef();
- if (R->isSubClassOf("Register")) {
+ if (R->isSubClassOf("Register") || R->getName() == "zero_reg") {
MIBuilder.addRenderer<AddRegisterRenderer>(Target, R);
return Error::success();
}
+ if (R->getName() == "undef_tied_input") {
+ std::optional<LLTCodeGen> OpTyOrNone = MVTToLLT(N.getSimpleType(0));
+ unsigned TempRegID = M.allocateTempRegID();
+ M.insertAction<MakeTempRegisterAction>(InsertPt, *OpTyOrNone, TempRegID);
+ auto I = M.insertAction<BuildMIAction>(
+ InsertPt, M.allocateOutputInsnID(),
+ &Target.getInstruction(RK.getDef("IMPLICIT_DEF")));
+ auto &ImpDefBuilder = static_cast<BuildMIAction &>(**I);
+ ImpDefBuilder.addRenderer<TempRegRenderer>(TempRegID, /*IsDef=*/true);
+ MIBuilder.addRenderer<TempRegRenderer>(TempRegID);
+ return Error::success();
+ }
+
if (R->isSubClassOf("SubRegIndex")) {
const CodeGenSubRegIndex *SubRegIndex = CGRegs.getSubRegIdx(R);
MIBuilder.addRenderer<ImmRenderer>(SubRegIndex->EnumValue);
@@ -1386,7 +1398,7 @@ Error GlobalISelEmitter::importNodeRenderer(RuleMatcher &M,
return importNamedNodeRenderer(M, MIBuilder, N);
if (N.isLeaf())
- return importLeafNodeRenderer(M, MIBuilder, N);
+ return importLeafNodeRenderer(M, MIBuilder, N, InsertPt);
if (N.getOperator()->isSubClassOf("SDNodeXForm"))
return importXFormNodeRenderer(M, MIBuilder, N);
@@ -1707,11 +1719,11 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderers(
// This is a predicate or optional def operand which the pattern has not
// overridden, or which we aren't letting it override; emit the 'default
// ops' operands.
-
- const Record *OperandNode = DstI->Operands[InstOpNo].Rec;
- if (auto Error = importDefaultOperandRenderers(
- InsertPt, M, DstMIBuilder, CGP.getDefaultOperand(OperandNode)))
- return std::move(Error);
+ for (const TreePatternNode &OpNode :
+ make_pointee_range(CGP.getDefaultOperand(OperandNode).DefaultOps)) {
+ if (Error Err = importNodeRenderer(M, DstMIBuilder, OpNode, InsertPt))
+ return Err;
+ }
++NumDefaultOps;
continue;
@@ -1734,47 +1746,6 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderers(
return InsertPt;
}
-Error GlobalISelEmitter::importDefaultOperandRenderers(
- action_iterator InsertPt, RuleMatcher &M, BuildMIAction &DstMIBuilder,
- const DAGDefaultOperand &DefaultOp) const {
- for (const auto &Op : DefaultOp.DefaultOps) {
- const auto &N = *Op;
- if (!N.isLeaf())
- return failedImport("Could not add default op");
-
- const auto *DefaultOp = N.getLeafValue();
-
- if (const DefInit *DefaultDefOp = dyn_cast<DefInit>(DefaultOp)) {
- std::optional<LLTCodeGen> OpTyOrNone = MVTToLLT(N.getSimpleType(0));
- auto *Def = DefaultDefOp->getDef();
- if (Def->getName() == "undef_tied_input") {
- unsigned TempRegID = M.allocateTempRegID();
- M.insertAction<MakeTempRegisterAction>(InsertPt, *OpTyOrNone,
- TempRegID);
- InsertPt = M.insertAction<BuildMIAction>(
- InsertPt, M.allocateOutputInsnID(),
- &Target.getInstruction(RK.getDef("IMPLICIT_DEF")));
- BuildMIAction &IDMIBuilder =
- *static_cast<BuildMIAction *>(InsertPt->get());
- IDMIBuilder.addRenderer<TempRegRenderer>(TempRegID);
- DstMIBuilder.addRenderer<TempRegRenderer>(TempRegID);
- } else {
- DstMIBuilder.addRenderer<AddRegisterRenderer>(Target, Def);
- }
- continue;
- }
-
- if (const IntInit *DefaultIntOp = dyn_cast<IntInit>(DefaultOp)) {
- DstMIBuilder.addRenderer<ImmRenderer>(DefaultIntOp->getValue());
- continue;
- }
-
- return failedImport("Could not add default op");
- }
-
- return Error::success();
-}
-
Error GlobalISelEmitter::importImplicitDefRenderers(
BuildMIAction &DstMIBuilder, ArrayRef<const Record *> ImplicitDefs) const {
if (!ImplicitDefs.empty())
|
3b0a77b
to
cd5435e
Compare
This avoids some code duplication (handling `Register`, `zero_reg` and immediate operands).
cd5435e
to
daa7154
Compare
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/198/builds/825 Here is the relevant piece of the build log for the reference
|
This avoids some code duplication (handling
Register
,zero_reg
and immediate operands).