[MLIR][NVVM] Declare InferIntRangeInterface for RangeableRegisterOp #122263
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
…gisterOp` `SpecialRangeableRegister` NVVM operations may have a `range` attribute set. When this attribute is present, it becomes possible to determine their range. This PR declares the `InferIntRangeInterface` for all `SpecialRangeableRegister` operations and extracts range information from the `range` attribute.
|
@llvm/pr-subscribers-mlir-llvm @llvm/pr-subscribers-mlir Author: Guray Ozen (grypp) Changes
This PR declares the Full diff: https://github.com/llvm/llvm-project/pull/122263.diff 3 Files Affected:
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h b/mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
index 4fd00ff929bd70..50d1a39126ea3e 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
@@ -19,6 +19,7 @@
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/IR/Dialect.h"
#include "mlir/IR/OpDefinition.h"
+#include "mlir/Interfaces/InferIntRangeInterface.h"
#include "mlir/Interfaces/SideEffectInterfaces.h"
#include "llvm/IR/IntrinsicsNVPTX.h"
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index a2d2102b59dece..d0d720e664ce3b 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -18,6 +18,7 @@ include "mlir/Dialect/GPU/IR/CompilationAttrInterfaces.td"
include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
include "mlir/Interfaces/SideEffectInterfaces.td"
include "mlir/Dialect/LLVMIR/BasicPtxBuilderInterface.td"
+include "mlir/Interfaces/InferIntRangeInterface.td"
def LLVM_PointerGeneric : LLVM_PointerInAddressSpace<0>;
def LLVM_PointerGlobal : LLVM_PointerInAddressSpace<1>;
@@ -134,8 +135,8 @@ class NVVM_SpecialRegisterOp<string mnemonic, list<Trait> traits = []> :
let assemblyFormat = "attr-dict `:` type($res)";
}
-class NVVM_SpecialRangeableRegisterOp<string mnemonic, list<Trait> traits = []> :
- NVVM_SpecialRegisterOp<mnemonic, traits> {
+class NVVM_SpecialRangeableRegisterOp<string mnemonic> :
+ NVVM_SpecialRegisterOp<mnemonic, [DeclareOpInterfaceMethods<InferIntRangeInterface, ["inferResultRanges"]>]> {
let arguments = (ins OptionalAttr<LLVM_ConstantRangeAttr>:$range);
let assemblyFormat = "(`range` $range^)? attr-dict `:` type($res)";
let llvmBuilder = baseLlvmBuilder # setRangeRetAttrCode # baseLlvmBuilderCoda;
@@ -147,6 +148,21 @@ class NVVM_SpecialRangeableRegisterOp<string mnemonic, list<Trait> traits = []>
build($_builder, $_state, resultType, ::mlir::LLVM::ConstantRangeAttr{});
}]>
];
+
+ // Define this method for the InferIntRangeInterface.
+ let extraClassDefinition = [{
+ // Infer the result ranges based on the range attribute.
+ void $cppClass::inferResultRanges(
+ ArrayRef<::mlir::ConstantIntRanges> argRanges,
+ SetIntRangeFn setResultRanges) {
+ if (auto rangeAttr = getOperation()->getAttrOfType<LLVM::ConstantRangeAttr>("range")) {
+ setResultRanges(getResult(),
+ {rangeAttr.getLower(), rangeAttr.getUpper(),
+ rangeAttr.getLower(), rangeAttr.getUpper()});
+ }
+ }
+ }];
+
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/test/Dialect/LLVMIR/nvvm-test-range.mlir b/mlir/test/Dialect/LLVMIR/nvvm-test-range.mlir
new file mode 100644
index 00000000000000..7014ff8aaa80b7
--- /dev/null
+++ b/mlir/test/Dialect/LLVMIR/nvvm-test-range.mlir
@@ -0,0 +1,28 @@
+// RUN: mlir-opt -int-range-optimizations -canonicalize %s | FileCheck %s
+gpu.module @module{
+ gpu.func @kernel_1() kernel {
+ %tidx = nvvm.read.ptx.sreg.tid.x range <i32, 0, 32> : i32
+ %tidy = nvvm.read.ptx.sreg.tid.y range <i32, 0, 128> : i32
+ %tidz = nvvm.read.ptx.sreg.tid.z range <i32, 0, 4> : i32
+ %c64 = arith.constant 64 : i32
+
+ %1 = arith.cmpi sgt, %tidx, %c64 : i32
+ scf.if %1 {
+ gpu.printf "threadidx"
+ }
+ %2 = arith.cmpi sgt, %tidy, %c64 : i32
+ scf.if %2 {
+ gpu.printf "threadidy"
+ }
+ %3 = arith.cmpi sgt, %tidz, %c64 : i32
+ scf.if %3 {
+ gpu.printf "threadidz"
+ }
+ gpu.return
+ }
+}
+
+// CHECK-LABEL: gpu.func @kernel_1
+// CHECK-NOT: gpu.printf "threadidx"
+// CHECK: gpu.printf "threadidy"
+// CHECK-NOT: gpu.printf "threadidz"
\ No newline at end of file
|
Dinistro
reviewed
Jan 9, 2025
durga4github
reviewed
Jan 9, 2025
|
✅ With the latest revision this PR passed the C/C++ code formatter. |
durga4github
reviewed
Jan 9, 2025
durga4github
approved these changes
Jan 9, 2025
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/89/builds/14051 Here is the relevant piece of the build log for the reference |
|
I also see a breakage in https://lab.llvm.org/staging/#/builders/105/builds/13077 |
|
1ef2580 did not fix the build issue |
|
Thank you. |
Yes, this one should fix it. |
BaiXilin
pushed a commit
to BaiXilin/llvm-fix-vnni-instr-types
that referenced
this pull request
Jan 12, 2025
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
SpecialRangeableRegisterNVVM operations may have arangeattribute set. When this attribute is present, it becomes possible to determine their range.This PR declares the
InferIntRangeInterfacefor allSpecialRangeableRegisteroperations and extracts range information from therangeattribute.