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[compiler-rt] Make Arm builtins aware of endianness in VMOVs #123204

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Merged
merged 5 commits into from
Jan 22, 2025

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vhscampos
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@vhscampos vhscampos commented Jan 16, 2025

This patch makes Arm builtins aware of endianness in VMOVs.

Before this patch, the functions' definitions assumed little endian, which made any program compiler for big endian incorrect.

This patch makes `__aeabi_dcmp` family of functions aware of endianness.

Before this patch, the functions' definitions assumed little endian,
which made any program compiler for big endian incorrect.
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This looks good to me.
Doubles are passed in consecutive as if loaded by a LDM
https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#6111handling-values-larger-than-32-bits
vmov d, r1, r2 according to the Arm ARM puts r1 into d[31:0] and r2 into d[63:32] so we need to reverse the order.

Looking at https://github.com/llvm/llvm-project/blob/main/compiler-rt/lib/builtins/arm/softfloat-alias.list there are several functions that may also use the same trick. At least some of these also use vmov d, r1, r2 without swapping when big-endian.

Would you be able to check to see if these can be called by a big-endian clang? I expect some of them may not alias to aeabi functions, although it may be possible for the compiler to output these helper functions with some other command-line options.

@vhscampos vhscampos changed the title [compiler-rt] Make __aeabi_dcmp aware of endianness [compiler-rt] Make arm builtins aware of endianness Jan 20, 2025
@vhscampos vhscampos changed the title [compiler-rt] Make arm builtins aware of endianness [compiler-rt] Make Arm builtins aware of endianness Jan 20, 2025
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@smithp35 For simplicity I've decided to add support of big endianness to all Arm builtins that have the same pattern (vmov between GPRs and double FP).

@vhscampos vhscampos changed the title [compiler-rt] Make Arm builtins aware of endianness [compiler-rt] Make Arm builtins aware of endianness in VMOVs Jan 20, 2025
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github-actions bot commented Jan 20, 2025

✅ With the latest revision this PR passed the C/C++ code formatter.

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I like the approach. I think I've spotted one typo where a core register has been used rather than a double.

@@ -24,7 +24,7 @@ DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
#else
vmov s15, r0 // move int to float register s15
vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
vmov r0, r1, d7 // move d7 to result register pair r0/r1
VMOV_FROM_DOUBLE(r0, r1, r7) // move d7 to result register pair r0/r1
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Did you mean vmov r0, r1, d7 here?

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Thanks. Fixed.

The typo didn't cause any failures in the picolibc tests. One indication that these parts here are undertested.

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It looks like the compiler-rt test suite would have caught this if it were built and run on exactly the right target with test/floatunssidfvfp_test.c

It looks like the little-endian side should be tested via the clang-armv7-2stage https://lab.llvm.org/buildbot/#/builders/79 as that will run the compiler-rt unit tests directly.

Testing big-endian is more difficult as we'd likely need to find a very old linux big-endian eabihf sysroot and use qemu-arm as our test executor.

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LGTM thanks for the update. Please leave a day or so for other reviewers to comment.

@vhscampos vhscampos merged commit ffde268 into llvm:main Jan 22, 2025
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@vhscampos vhscampos deleted the __aeabi_dcmp-endianness branch January 22, 2025 10:56
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3 participants