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[TargetLowering] Use getShiftAmountConstant. NFC #123802
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Previously we always used the pointer size which might need to be legalized on some targets.
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LGTM
@llvm/pr-subscribers-llvm-selectiondag Author: Craig Topper (topperc) ChangesPreviously we always used the pointer size which might need to be legalized on some targets. Full diff: https://github.com/llvm/llvm-project/pull/123802.diff 1 Files Affected:
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 368800d8b46a87..5861a95c090b1d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -10959,12 +10959,9 @@ void TargetLowering::forceExpandWideMUL(SelectionDAG &DAG, const SDLoc &dl,
// The high part is obtained by SRA'ing all but one of the bits of low
// part.
unsigned LoSize = VT.getFixedSizeInBits();
- HiLHS = DAG.getNode(
- ISD::SRA, dl, VT, LHS,
- DAG.getConstant(LoSize - 1, dl, getPointerTy(DAG.getDataLayout())));
- HiRHS = DAG.getNode(
- ISD::SRA, dl, VT, RHS,
- DAG.getConstant(LoSize - 1, dl, getPointerTy(DAG.getDataLayout())));
+ SDValue Shift = DAG.getShiftAmountConstant(LoSize - 1, VT, dl);
+ HiLHS = DAG.getNode(ISD::SRA, dl, VT, LHS, Shift);
+ HiRHS = DAG.getNode(ISD::SRA, dl, VT, RHS, Shift);
} else {
HiLHS = DAG.getConstant(0, dl, VT);
HiRHS = DAG.getConstant(0, dl, VT);
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LGTM
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/16/builds/12382 Here is the relevant piece of the build log for the reference
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Previously we always used the pointer size which might need to be legalized on some targets.