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PeepholeOpt: Simplify tracking of current op for copy and reg_sequence #124224

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Jan 30, 2025
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PeepholeOpt: Simplify tracking of current op for copy and reg_sequence #124224

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31 changes: 8 additions & 23 deletions llvm/lib/CodeGen/PeepholeOptimizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -153,7 +153,7 @@ class RecurrenceInstr;
class Rewriter {
protected:
MachineInstr &CopyLike;
unsigned CurrentSrcIdx = 0; ///< The index of the source being rewritten.
int CurrentSrcIdx = 0; ///< The index of the source being rewritten.
public:
Rewriter(MachineInstr &CopyLike) : CopyLike(CopyLike) {}
virtual ~Rewriter() = default;
Expand Down Expand Up @@ -201,12 +201,9 @@ class CopyRewriter : public Rewriter {

bool getNextRewritableSource(RegSubRegPair &Src,
RegSubRegPair &Dst) override {
// CurrentSrcIdx > 0 means this function has already been called.
if (CurrentSrcIdx > 0)
if (CurrentSrcIdx++ > 1)
return false;
// This is the first call to getNextRewritableSource.
// Move the CurrentSrcIdx to remember that we made that call.
CurrentSrcIdx = 1;

// The rewritable source is the argument.
const MachineOperand &MOSrc = CopyLike.getOperand(1);
Src = RegSubRegPair(MOSrc.getReg(), MOSrc.getSubReg());
Expand All @@ -217,8 +214,6 @@ class CopyRewriter : public Rewriter {
}

bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override {
if (CurrentSrcIdx != 1)
return false;
MachineOperand &MOSrc = CopyLike.getOperand(CurrentSrcIdx);
MOSrc.setReg(NewReg);
MOSrc.setSubReg(NewSubReg);
Expand All @@ -229,7 +224,7 @@ class CopyRewriter : public Rewriter {
/// Helper class to rewrite uncoalescable copy like instructions
/// into new COPY (coalescable friendly) instructions.
class UncoalescableRewriter : public Rewriter {
unsigned NumDefs; ///< Number of defs in the bitcast.
int NumDefs; ///< Number of defs in the bitcast.

public:
UncoalescableRewriter(MachineInstr &MI) : Rewriter(MI) {
Expand Down Expand Up @@ -383,6 +378,7 @@ class RegSequenceRewriter : public Rewriter {
public:
RegSequenceRewriter(MachineInstr &MI) : Rewriter(MI) {
assert(MI.isRegSequence() && "Invalid instruction");
CurrentSrcIdx = -1;
}

/// \see Rewriter::getNextRewritableSource()
Expand All @@ -404,16 +400,10 @@ class RegSequenceRewriter : public Rewriter {
bool getNextRewritableSource(RegSubRegPair &Src,
RegSubRegPair &Dst) override {
// We are looking at v0 = REG_SEQUENCE v1, sub1, v2, sub2, etc.
CurrentSrcIdx += 2;
if (static_cast<unsigned>(CurrentSrcIdx) >= CopyLike.getNumOperands())
return false;

// If this is the first call, move to the first argument.
if (CurrentSrcIdx == 0) {
CurrentSrcIdx = 1;
} else {
// Otherwise, move to the next argument and check that it is valid.
CurrentSrcIdx += 2;
if (CurrentSrcIdx >= CopyLike.getNumOperands())
return false;
}
const MachineOperand &MOInsertedReg = CopyLike.getOperand(CurrentSrcIdx);
Src.Reg = MOInsertedReg.getReg();
// If we have to compose sub-register indices, bail out.
Expand All @@ -431,11 +421,6 @@ class RegSequenceRewriter : public Rewriter {
}

bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override {
// We cannot rewrite out of bound operands.
// Moreover, rewritable sources are at odd positions.
if ((CurrentSrcIdx & 1) != 1 || CurrentSrcIdx > CopyLike.getNumOperands())
return false;

// Do not introduce new subregister uses in a reg_sequence. Until composing
// subregister indices is supported while folding, we're just blocking
// folding of subregister copies later in the function.
Expand Down