[InstCombine] Drop samesign in foldLogOpOfMaskedICmps

[dtcxzyw]

Alive2: https://alive2.llvm.org/ce/z/6zLAYp

Note: We can also apply this fix to the logic below (if (Mask & AMask_NotAllOnes)), but it seems unreachable.

[llvmbot]

@llvm/pr-subscribers-llvm-transforms

Author: Yingwei Zheng (dtcxzyw)

Changes

Alive2: https://alive2.llvm.org/ce/z/6zLAYp

Note: We can also apply this fix to the logic below (if (Mask & AMask_NotAllOnes)), but it seems unreachable.

---

Full diff: https://github.com/llvm/llvm-project/pull/125829.diff

2 Files Affected:

• (modified) llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (+4-1)
• (modified) llvm/test/Transforms/InstCombine/sign-test-and-or.ll (+23)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 8701f7c28a39fc..29f67f34a017ca 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -610,8 +610,11 @@ static Value *foldLogOpOfMaskedICmps(Value *LHS, Value *RHS, bool IsAnd,
       APInt NewMask = *ConstB & *ConstD;
       if (NewMask == *ConstB)
         return LHS;
-      if (NewMask == *ConstD)
+      if (NewMask == *ConstD) {
+        if (IsLogical)
+          cast<ICmpInst>(RHS)->setSameSign(false);
         return RHS;
+      }
     }
 
     if (Mask & AMask_NotAllOnes) {
diff --git a/llvm/test/Transforms/InstCombine/sign-test-and-or.ll b/llvm/test/Transforms/InstCombine/sign-test-and-or.ll
index 65363620563bed..3e9ff63869d646 100644
--- a/llvm/test/Transforms/InstCombine/sign-test-and-or.ll
+++ b/llvm/test/Transforms/InstCombine/sign-test-and-or.ll
@@ -349,6 +349,29 @@ define i1 @test9_logical(i32 %a) {
   ret i1 %or.cond
 }
 
+define i1 @test9_logical_samesign(i32 %a) {
+; CHECK-LABEL: @test9_logical_samesign(
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[A:%.*]], -1
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %masked = and i32 %a, -1073741825
+  %cmp1 = icmp eq i32 %masked, 0
+  %cmp2 = icmp samesign sgt i32 %a, -1
+  %or.cond = select i1 %cmp1, i1 true, i1 %cmp2
+  ret i1 %or.cond
+}
+
+define i1 @test_logical_or_icmp_icmp_samesign(i32 %a) {
+; CHECK-LABEL: @test_logical_or_icmp_icmp_samesign(
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[A:%.*]], -1
+; CHECK-NEXT:    ret i1 [[CMP2]]
+;
+  %cmp1 = icmp eq i32 %a, 0
+  %cmp2 = icmp samesign sgt i32 %a, -1
+  %or = select i1 %cmp1, i1 true, i1 %cmp2
+  ret i1 %or
+}
+
 define i1 @test10(i32 %a) {
 ; CHECK-LABEL: @test10(
 ; CHECK-NEXT:    [[OR_COND:%.*]] = icmp ult i32 [[A:%.*]], 2

[andjo403]

Looks good to me but wait for other reviewers

[goldsteinn]

LGTM