Skip to content

[AArch64] Update feature dep. for Armv9.6 extensions #125874

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Feb 6, 2025
Merged

[AArch64] Update feature dep. for Armv9.6 extensions #125874

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
81a4729
[AArch64] Update feature dep. for Armv9.6 extensions
CarolineConcatto Feb 4, 2025
d9dfec3
Address review comments
CarolineConcatto Feb 5, 2025
48c80a8
Fix aarch64-fujitsu-monaka extension test
CarolineConcatto Feb 6, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
10 changes: 5 additions & 5 deletions llvm/lib/Target/AArch64/AArch64Features.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -473,13 +473,13 @@ def FeatureD128 : ExtensionWithMArch<"d128", "D128",
//===----------------------------------------------------------------------===//

def FeatureFAMINMAX: ExtensionWithMArch<"faminmax", "FAMINMAX", "FEAT_FAMINMAX",
"Enable FAMIN and FAMAX instructions">;
"Enable FAMIN and FAMAX instructions", [FeatureNEON]>;

def FeatureLUT: ExtensionWithMArch<"lut", "LUT", "FEAT_LUT",
"Enable Lookup Table instructions">;
"Enable Lookup Table instructions", [FeatureNEON]>;

def FeatureFP8 : ExtensionWithMArch<"fp8", "FP8", "FEAT_FP8",
"Enable FP8 instructions", [FeatureFAMINMAX, FeatureLUT, FeatureBF16]>;
"Enable FP8 instructions", [FeatureNEON]>;

def FeatureFP8FMA : ExtensionWithMArch<"fp8fma", "FP8FMA", "FEAT_FP8FMA",
"Enable Armv9.5-A FP8 multiply-add instructions", [FeatureFP8]>;
Expand All @@ -488,10 +488,10 @@ def FeatureSSVE_FP8FMA : ExtensionWithMArch<"ssve-fp8fma", "SSVE_FP8FMA", "FEAT_
"Enable SVE2 FP8 multiply-add instructions", [FeatureSME2, FeatureFP8]>;

def FeatureFP8DOT4: ExtensionWithMArch<"fp8dot4", "FP8DOT4", "FEAT_FP8DOT4",
"Enable FP8 4-way dot instructions", [FeatureNEON, FeatureFP8]>;
"Enable FP8 4-way dot instructions", [FeatureFP8]>;

def FeatureFP8DOT2: ExtensionWithMArch<"fp8dot2", "FP8DOT2", "FEAT_FP8DOT2",
"Enable FP8 2-way dot instructions", [FeatureNEON, FeatureFP8]>;
"Enable FP8 2-way dot instructions", [FeatureFP8]>;

def FeatureSSVE_FP8DOT4 : ExtensionWithMArch<"ssve-fp8dot4", "SSVE_FP8DOT4", "FEAT_SSVE_FP8DOT4",
"Enable SVE2 FP8 4-way dot product instructions", [FeatureSME2, FeatureFP8]>;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64Processors.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -868,7 +868,7 @@ def ProcessorFeatures {
FeatureSSBS, FeatureLS64, FeatureCLRBHB,
FeatureSPECRES2, FeatureSVEAES, FeatureSVE2SM4,
FeatureSVE2SHA3, FeatureSVE2, FeatureSVEBitPerm, FeatureETE,
FeatureMEC, FeatureFP8DOT2];
FeatureMEC, FeatureFAMINMAX, FeatureFP8DOT2, FeatureLUT];
list<SubtargetFeature> Carmel = [HasV8_2aOps, FeatureNEON, FeatureSHA2, FeatureAES,
FeatureFullFP16, FeatureCRC, FeatureLSE, FeatureRAS, FeatureRDM,
FeatureFPARMv8];
Expand Down
18 changes: 13 additions & 5 deletions llvm/unittests/TargetParser/TargetParserTest.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1815,7 +1815,7 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A, {"nofp", "fprcvt"}, {"fp-armv8", "fprcvt"}, {}},
{AArch64::ARMV9_6A, {"fprcvt", "nofp"}, {}, {"fp-armv8", "fprcvt"}},

// simd -> {aes, sha2, sha3, sm4, f8f16mm, f8f32mm, fp8dot4, fp8dot2}
// simd -> {aes, sha2, sha3, sm4, f8f16mm, f8f32mm, faminmax, lut, fp8}
{AArch64::ARMV8A, {"nosimd", "aes"}, {"neon", "aes"}, {}},
{AArch64::ARMV8A, {"aes", "nosimd"}, {}, {"neon", "aes"}},
{AArch64::ARMV8A, {"nosimd", "sha2"}, {"neon", "sha2"}, {}},
Expand All @@ -1828,10 +1828,18 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A, {"f8f16mm", "nosimd"}, {}, {"neon", "f8f16mm"}},
{AArch64::ARMV9_6A, {"nosimd", "f8f32mm"}, {"neon", "f8f32mm"}, {}},
{AArch64::ARMV9_6A, {"f8f32mm", "nosimd"}, {}, {"neon", "f8f32mm"}},
{AArch64::ARMV9_6A, {"nosimd", "fp8dot4"}, {"neon", "fp8dot4"}, {}},
{AArch64::ARMV9_6A, {"fp8dot4", "nosimd"}, {}, {"neon", "fp8dot4"}},
{AArch64::ARMV9_6A, {"nosimd", "fp8dot2"}, {"neon", "fp8dot2"}, {}},
{AArch64::ARMV9_6A, {"fp8dot2", "nosimd"}, {}, {"neon", "fp8dot2"}},
{AArch64::ARMV9_6A, {"faminmax", "nosimd"}, {}, {"neon", "faminmax"}},
{AArch64::ARMV9_6A, {"nosimd", "faminmax"}, {"neon", "faminmax"}, {}},
{AArch64::ARMV9_6A, {"lut", "nosimd"}, {}, {"neon", "lut"}},
{AArch64::ARMV9_6A, {"nosimd", "lut"}, {"neon", "lut"}, {}},
{AArch64::ARMV9_6A, {"fp8", "nosimd"}, {}, {"neon", "fp8"}},
{AArch64::ARMV9_6A, {"nosimd", "fp8"}, {"neon", "fp8"}, {}},

// fp8 -> {fp8dot4, fp8dot2}
{AArch64::ARMV9_6A, {"nofp8", "fp8dot4"}, {"fp8", "fp8dot4"}, {}},
{AArch64::ARMV9_6A, {"fp8dot4", "nofp8"}, {}, {"fp8", "fp8dot4"}},
{AArch64::ARMV9_6A, {"nofp8", "fp8dot2"}, {"fp8", "fp8dot2"}, {}},
{AArch64::ARMV9_6A, {"fp8dot2", "nofp8"}, {}, {"fp8", "fp8dot2"}},

// simd -> {rdm, dotprod, fcma}
{AArch64::ARMV8A, {"nosimd", "rdm"}, {"neon", "rdm"}, {}},
Expand Down