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[flang][OMPIRbuilder] Set debug loc on terminator created by splitBB. #125897

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12 changes: 7 additions & 5 deletions llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -40,9 +40,10 @@ class OpenMPIRBuilder;
/// not have any PHINodes. If \p CreateBranch is true, a branch instruction to
/// \p New will be added such that there is no semantic change. Otherwise, the
/// \p IP insert block remains degenerate and it is up to the caller to insert a
/// terminator.
void spliceBB(IRBuilderBase::InsertPoint IP, BasicBlock *New,
bool CreateBranch);
/// terminator. \p DL is used as the debug location for the branch instruction
/// if one is created.
void spliceBB(IRBuilderBase::InsertPoint IP, BasicBlock *New, bool CreateBranch,
DebugLoc DL);

/// Splice a BasicBlock at an IRBuilder's current insertion point. Its new
/// insert location will stick to after the instruction before the insertion
Expand All @@ -58,9 +59,10 @@ void spliceBB(IRBuilder<> &Builder, BasicBlock *New, bool CreateBranch);
/// is true, a branch to the new successor will new created such that
/// semantically there is no change; otherwise the block of the insertion point
/// remains degenerate and it is the caller's responsibility to insert a
/// terminator. Returns the new successor block.
/// terminator. \p DL is used as the debug location for the branch instruction
/// if one is created. Returns the new successor block.
BasicBlock *splitBB(IRBuilderBase::InsertPoint IP, bool CreateBranch,
llvm::Twine Name = {});
DebugLoc DL, llvm::Twine Name = {});

/// Split a BasicBlock at \p Builder's insertion point, even if the block is
/// degenerate (missing the terminator). Its new insert location will stick to
Expand Down
20 changes: 11 additions & 9 deletions llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -313,23 +313,25 @@ static void redirectTo(BasicBlock *Source, BasicBlock *Target, DebugLoc DL) {
}

void llvm::spliceBB(IRBuilderBase::InsertPoint IP, BasicBlock *New,
bool CreateBranch) {
bool CreateBranch, DebugLoc DL) {
assert(New->getFirstInsertionPt() == New->begin() &&
"Target BB must not have PHI nodes");

// Move instructions to new block.
BasicBlock *Old = IP.getBlock();
New->splice(New->begin(), Old, IP.getPoint(), Old->end());

if (CreateBranch)
BranchInst::Create(New, Old);
if (CreateBranch) {
auto *NewBr = BranchInst::Create(New, Old);
NewBr->setDebugLoc(DL);
}
}

void llvm::spliceBB(IRBuilder<> &Builder, BasicBlock *New, bool CreateBranch) {
DebugLoc DebugLoc = Builder.getCurrentDebugLocation();
BasicBlock *Old = Builder.GetInsertBlock();

spliceBB(Builder.saveIP(), New, CreateBranch);
spliceBB(Builder.saveIP(), New, CreateBranch, DebugLoc);
if (CreateBranch)
Builder.SetInsertPoint(Old->getTerminator());
else
Expand All @@ -341,20 +343,20 @@ void llvm::spliceBB(IRBuilder<> &Builder, BasicBlock *New, bool CreateBranch) {
}

BasicBlock *llvm::splitBB(IRBuilderBase::InsertPoint IP, bool CreateBranch,
llvm::Twine Name) {
DebugLoc DL, llvm::Twine Name) {
BasicBlock *Old = IP.getBlock();
BasicBlock *New = BasicBlock::Create(
Old->getContext(), Name.isTriviallyEmpty() ? Old->getName() : Name,
Old->getParent(), Old->getNextNode());
spliceBB(IP, New, CreateBranch);
spliceBB(IP, New, CreateBranch, DL);
New->replaceSuccessorsPhiUsesWith(Old, New);
return New;
}

BasicBlock *llvm::splitBB(IRBuilderBase &Builder, bool CreateBranch,
llvm::Twine Name) {
DebugLoc DebugLoc = Builder.getCurrentDebugLocation();
BasicBlock *New = splitBB(Builder.saveIP(), CreateBranch, Name);
BasicBlock *New = splitBB(Builder.saveIP(), CreateBranch, DebugLoc, Name);
if (CreateBranch)
Builder.SetInsertPoint(Builder.GetInsertBlock()->getTerminator());
else
Expand All @@ -368,7 +370,7 @@ BasicBlock *llvm::splitBB(IRBuilderBase &Builder, bool CreateBranch,
BasicBlock *llvm::splitBB(IRBuilder<> &Builder, bool CreateBranch,
llvm::Twine Name) {
DebugLoc DebugLoc = Builder.getCurrentDebugLocation();
BasicBlock *New = splitBB(Builder.saveIP(), CreateBranch, Name);
BasicBlock *New = splitBB(Builder.saveIP(), CreateBranch, DebugLoc, Name);
if (CreateBranch)
Builder.SetInsertPoint(Builder.GetInsertBlock()->getTerminator());
else
Expand Down Expand Up @@ -5303,7 +5305,7 @@ void OpenMPIRBuilder::createIfVersion(CanonicalLoopInfo *CanonicalLoop,
Builder.CreateCondBr(IfCond, ThenBlock, /*ifFalse*/ ElseBlock);
InsertPointTy IP{BrInstr->getParent(), ++BrInstr->getIterator()};
// Then block contains branch to omp loop which needs to be vectorized
spliceBB(IP, ThenBlock, false);
spliceBB(IP, ThenBlock, false, Builder.getCurrentDebugLocation());
ThenBlock->replaceSuccessorsPhiUsesWith(Head, ThenBlock);

Builder.SetInsertPoint(ElseBlock);
Expand Down
16 changes: 16 additions & 0 deletions llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7653,4 +7653,20 @@ TEST_F(OpenMPIRBuilderTest, createGPUOffloadEntry) {
EXPECT_TRUE(Fn->hasFnAttribute(Attribute::MustProgress));
}

TEST_F(OpenMPIRBuilderTest, splitBB) {
OpenMPIRBuilder OMPBuilder(*M);
OMPBuilder.Config.IsTargetDevice = false;
OMPBuilder.initialize();
F->setName("func");
IRBuilder<> Builder(BB);

Builder.SetCurrentDebugLocation(DL);
AllocaInst *alloc = Builder.CreateAlloca(Builder.getInt32Ty());
EXPECT_TRUE(DL == alloc->getStableDebugLoc());
BasicBlock *AllocaBB = Builder.GetInsertBlock();
splitBB(Builder, /*CreateBranch=*/true, "test");
if (AllocaBB->getTerminator())
EXPECT_TRUE(DL == AllocaBB->getTerminator()->getStableDebugLoc());
}

} // namespace
Original file line number Diff line number Diff line change
Expand Up @@ -1392,7 +1392,8 @@ static llvm::Expected<llvm::BasicBlock *> allocateAndInitPrivateVars(
llvm::cast<llvm::BranchInst>(allocaIP.getBlock()->getTerminator());
splitBB(llvm::OpenMPIRBuilder::InsertPointTy(allocaIP.getBlock(),
allocaTerminator->getIterator()),
true, "omp.region.after_alloca");
true, allocaTerminator->getStableDebugLoc(),
"omp.region.after_alloca");

llvm::IRBuilderBase::InsertPointGuard guard(builder);
// Update the allocaTerminator in case the alloca block was split above.
Expand Down
40 changes: 40 additions & 0 deletions mlir/test/Target/LLVMIR/omptarget-debug-nowait.mlir
Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
// RUN: mlir-translate -mlir-to-llvmir %s

module attributes {omp.is_target_device = false} {
llvm.func @main() {
%0 = llvm.mlir.constant(1 : i64) : i64
%1 = llvm.alloca %0 x f32 : (i64) -> !llvm.ptr
%3 = llvm.alloca %0 x i32 : (i64) -> !llvm.ptr
%6 = omp.map.info var_ptr(%1 : !llvm.ptr, f32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr
%7 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr
omp.target nowait map_entries(%6 -> %arg0, %7 -> %arg1 : !llvm.ptr, !llvm.ptr) {
%8 = llvm.mlir.constant(0 : i64) : i64
%9 = llvm.mlir.constant(100 : i32) : i32
llvm.br ^bb1(%9, %8 : i32, i64)
^bb1(%13: i32, %14: i64): // 2 preds: ^bb0, ^bb2
%15 = llvm.icmp "sgt" %14, %8 : i64
llvm.cond_br %15, ^bb2, ^bb3
^bb2: // pred: ^bb1
llvm.store %13, %arg1 : i32, !llvm.ptr
llvm.br ^bb1(%13, %14 : i32, i64)
^bb3: // pred: ^bb1
llvm.store %13, %arg1 : i32, !llvm.ptr
omp.terminator
}
llvm.return
} loc(#loc2)
}

#file = #llvm.di_file<"test.f90" in "">
#di_null_type = #llvm.di_null_type
#cu = #llvm.di_compile_unit<id = distinct[0]<>,
sourceLanguage = DW_LANG_Fortran95, file = #file, isOptimized = false,
emissionKind = Full>
#sp_ty = #llvm.di_subroutine_type<callingConvention = DW_CC_program,
types = #di_null_type>
#sp = #llvm.di_subprogram<compileUnit = #cu, name = "main", file=#file,
subprogramFlags = "Definition", type = #sp_ty>

#loc1 = loc("test.f90":6:7)
#loc2 = loc(fused<#sp>[#loc1])