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release/20.x: [RISCV] Use getSignedConstant for negative values. (#125903) #125953

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Merged
merged 1 commit into from
Feb 6, 2025
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release/20.x: [RISCV] Use getSignedConstant for negative values. (#125903) #125953

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4 changes: 2 additions & 2 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16297,7 +16297,7 @@ static SDValue performVP_REVERSECombine(SDNode *N, SelectionDAG &DAG,
SDValue Temp2 = DAG.getNode(ISD::MUL, DL, XLenVT, Temp1,
DAG.getConstant(ElemWidthByte, DL, XLenVT));
SDValue Base = DAG.getNode(ISD::ADD, DL, XLenVT, VPLoad->getBasePtr(), Temp2);
SDValue Stride = DAG.getConstant(-ElemWidthByte, DL, XLenVT);
SDValue Stride = DAG.getSignedConstant(-ElemWidthByte, DL, XLenVT);

MachineFunction &MF = DAG.getMachineFunction();
MachinePointerInfo PtrInfo(VPLoad->getAddressSpace());
Expand Down Expand Up @@ -16358,7 +16358,7 @@ static SDValue performVP_STORECombine(SDNode *N, SelectionDAG &DAG,
DAG.getConstant(ElemWidthByte, DL, XLenVT));
SDValue Base =
DAG.getNode(ISD::ADD, DL, XLenVT, VPStore->getBasePtr(), Temp2);
SDValue Stride = DAG.getConstant(-ElemWidthByte, DL, XLenVT);
SDValue Stride = DAG.getSignedConstant(-ElemWidthByte, DL, XLenVT);

MachineFunction &MF = DAG.getMachineFunction();
MachinePointerInfo PtrInfo(VPStore->getAddressSpace());
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
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@@ -1,4 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | FileCheck %s

define <vscale x 2 x float> @test_reverse_load_combiner(<vscale x 2 x float>* %ptr, i32 zeroext %evl) {
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
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@@ -1,4 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | FileCheck %s

define void @test_store_reverse_combiner(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, i32 zeroext %evl) {
Expand Down