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[lldb] add required for lldb RISCV relocations in MCJIT #126266

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Merged
merged 1 commit into from
Apr 14, 2025

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dlav-sc
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@dlav-sc dlav-sc commented Feb 7, 2025

After implementing CFI instructions in the function prologue, LLDB testing for RISC-V started failing due to insufficient relocations (e.g., R_RISCV_SET8, R_RISCV_SET16).

This patch adds support for the necessary RISC-V relocations in MCJIT.

After implementing CFI instructions in the function prologue, LLDB
testing for RISC-V started failing due to insufficient relocations
(e.g., R_RISCV_SET8, R_RISCV_SET16).

This patch adds support for the necessary RISC-V relocations in MCJIT.
@llvmbot
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llvmbot commented Feb 7, 2025

@llvm/pr-subscribers-llvm-support

Author: None (dlav-sc)

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After implementing CFI instructions in the function prologue, LLDB testing for RISC-V started failing due to insufficient relocations (e.g., R_RISCV_SET8, R_RISCV_SET16).

This patch adds support for the necessary RISC-V relocations in MCJIT.


Full diff: https://github.com/llvm/llvm-project/pull/126266.diff

2 Files Affected:

  • (modified) llvm/include/llvm/Support/Endian.h (+3)
  • (modified) llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp (+25)
diff --git a/llvm/include/llvm/Support/Endian.h b/llvm/include/llvm/Support/Endian.h
index f86ea8901ae46b8..574f9508420a0bf 100644
--- a/llvm/include/llvm/Support/Endian.h
+++ b/llvm/include/llvm/Support/Endian.h
@@ -277,6 +277,9 @@ struct packed_endian_specific_integral {
 
 } // end namespace detail
 
+using ulittle8_t =
+    detail::packed_endian_specific_integral<uint8_t, llvm::endianness::little,
+                                            unaligned>;
 using ulittle16_t =
     detail::packed_endian_specific_integral<uint16_t, llvm::endianness::little,
                                             unaligned>;
diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
index 0fc05a47648c1df..07dfb3c1ff3a7eb 100644
--- a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
+++ b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
@@ -1306,6 +1306,11 @@ void RuntimeDyldELF::resolveRISCVRelocation(const SectionEntry &Section,
     Ref = Value + Addend;
     break;
   }
+  case ELF::R_RISCV_ADD8: {
+    auto Ref = support::ulittle8_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Ref + Value + Addend;
+    break;
+  }
   case ELF::R_RISCV_ADD16: {
     auto Ref = support::ulittle16_t::ref(Section.getAddressWithOffset(Offset));
     Ref = Ref + Value + Addend;
@@ -1321,6 +1326,11 @@ void RuntimeDyldELF::resolveRISCVRelocation(const SectionEntry &Section,
     Ref = Ref + Value + Addend;
     break;
   }
+  case ELF::R_RISCV_SUB8: {
+    auto Ref = support::ulittle8_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Ref - Value - Addend;
+    break;
+  }
   case ELF::R_RISCV_SUB16: {
     auto Ref = support::ulittle16_t::ref(Section.getAddressWithOffset(Offset));
     Ref = Ref - Value - Addend;
@@ -1336,6 +1346,21 @@ void RuntimeDyldELF::resolveRISCVRelocation(const SectionEntry &Section,
     Ref = Ref - Value - Addend;
     break;
   }
+  case ELF::R_RISCV_SET8: {
+    auto Ref = support::ulittle8_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Value + Addend;
+    break;
+  }
+  case ELF::R_RISCV_SET16: {
+    auto Ref = support::ulittle16_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Value + Addend;
+    break;
+  }
+  case ELF::R_RISCV_SET32: {
+    auto Ref = support::ulittle32_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Value + Addend;
+    break;
+  }
   }
 }
 

@dlav-sc
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dlav-sc commented Mar 31, 2025

I'm going to land this by the end of the week. If you have any concerns, please let me know.

@dlav-sc
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dlav-sc commented Apr 7, 2025

Hi, @lhames. Could you take a look at these changes in RuntimeDyld, please? I'm going to land this in a few days.

@dlav-sc dlav-sc merged commit 14cb8c5 into llvm:main Apr 14, 2025
10 checks passed
var-const pushed a commit to ldionne/llvm-project that referenced this pull request Apr 17, 2025
After implementing CFI instructions in the function prologue, LLDB
testing for RISC-V started failing due to insufficient relocations
(e.g., R_RISCV_SET8, R_RISCV_SET16).

This patch adds support for the necessary RISC-V relocations in MCJIT.
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2 participants