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[Attributor] Don't replace addrspacecast (ptr null to ptr addrspace(x)) with ptr addrspace(x) null #126779

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Merged
merged 1 commit into from
May 20, 2025
Merged

[Attributor] Don't replace addrspacecast (ptr null to ptr addrspace(x)) with ptr addrspace(x) null #126779

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2 changes: 1 addition & 1 deletion llvm/lib/Transforms/IPO/Attributor.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -325,7 +325,7 @@ Value *AA::getWithType(Value &V, Type &Ty) {
if (isa<UndefValue>(V))
return UndefValue::get(&Ty);
if (auto *C = dyn_cast<Constant>(&V)) {
if (C->isNullValue())
if (C->isNullValue() && !Ty.isPtrOrPtrVectorTy())
return Constant::getNullValue(&Ty);
if (C->getType()->isPointerTy() && Ty.isPointerTy())
return ConstantExpr::getPointerCast(C, &Ty);
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/addrspacecast.ll
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Expand Up @@ -217,7 +217,7 @@ define amdgpu_kernel void @use_flat_to_constant_addrspacecast(ptr %ptr) #0 {
; HSA-LABEL: {{^}}cast_0_group_to_flat_addrspacecast:

; HSA-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], 0{{$}}
; HSA-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}}
; HSA-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s{{[0-9]+}}
; HSA-DAG: v_mov_b32_e32 v[[K:[0-9]+]], 7{{$}}
; HSA: flat_store_dword v[[[LO]]:[[HI]]], v[[K]]
define amdgpu_kernel void @cast_0_group_to_flat_addrspacecast() #0 {
Expand Down Expand Up @@ -260,7 +260,7 @@ define amdgpu_kernel void @cast_neg1_flat_to_group_addrspacecast() #0 {
; FIXME: Shouldn't need to enable queue ptr
; HSA-LABEL: {{^}}cast_0_private_to_flat_addrspacecast:
; HSA-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], 0{{$}}
; HSA-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}}
; HSA-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s{{[0-9]+}}
; HSA-DAG: v_mov_b32_e32 v[[K:[0-9]+]], 7{{$}}
; HSA: flat_store_dword v[[[LO]]:[[HI]]], v[[K]]
define amdgpu_kernel void @cast_0_private_to_flat_addrspacecast() #0 {
Expand Down
71 changes: 71 additions & 0 deletions ...est/Transforms/Attributor/AMDGPU/do-not-replace-addrspacecast-with-constantpointernull.ll
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@@ -0,0 +1,71 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=attributor %s -o - | FileCheck %s

define i32 @addrspacecast_ptr(ptr %p0, ptr addrspace(5) %p5) {
; CHECK-LABEL: define i32 @addrspacecast_ptr(
; CHECK-SAME: ptr nofree readonly captures(none) [[P0:%.*]], ptr addrspace(5) nofree readonly [[P5:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ICMP:%.*]] = icmp eq ptr addrspace(5) [[P5]], addrspacecast (ptr null to ptr addrspace(5))
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[ICMP]], ptr [[P0]], ptr null
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[SELECT]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%icmp = icmp eq ptr addrspace(5) %p5, addrspacecast (ptr null to ptr addrspace(5))
%select = select i1 %icmp, ptr %p0, ptr null
%load = load i32, ptr %select, align 4
ret i32 %load
}

define i32 @vec_addrspacecast_ptr(ptr %p0, ptr %p1, <2 x ptr addrspace(5)> %ptrvec) {
; CHECK-LABEL: define i32 @vec_addrspacecast_ptr(
; CHECK-SAME: ptr nofree readonly captures(none) [[P0:%.*]], ptr nofree noundef nonnull readonly align 16 captures(none) dereferenceable(8) [[P1:%.*]], <2 x ptr addrspace(5)> [[PTRVEC:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[LOADVEC:%.*]] = load <2 x ptr addrspace(5)>, ptr [[P1]], align 16
; CHECK-NEXT: [[ICMPVEC:%.*]] = icmp eq <2 x ptr addrspace(5)> [[LOADVEC]], <ptr addrspace(5) addrspacecast (ptr null to ptr addrspace(5)), ptr addrspace(5) addrspacecast (ptr null to ptr addrspace(5))>
; CHECK-NEXT: [[ICMP:%.*]] = extractelement <2 x i1> [[ICMPVEC]], i32 1
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[ICMP]], ptr [[P0]], ptr null
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[SELECT]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%loadvec = load <2 x ptr addrspace(5)>, ptr %p1, align 16
%icmpvec = icmp eq <2 x ptr addrspace(5)> %loadvec, <ptr addrspace(5) addrspacecast (ptr null to ptr addrspace(5)), ptr addrspace(5) addrspacecast (ptr null to ptr addrspace(5))>
%icmp = extractelement <2 x i1> %icmpvec, i32 1
%select = select i1 %icmp, ptr %p0, ptr null
%load = load i32, ptr %select, align 4
ret i32 %load
}

define i32 @addrspacecast_vec_as1_ptr(ptr %p0, ptr %p1, <2 x ptr addrspace(5)> %ptrvec) {
; CHECK-LABEL: define i32 @addrspacecast_vec_as1_ptr(
; CHECK-SAME: ptr nofree readonly captures(none) [[P0:%.*]], ptr nofree noundef nonnull readonly align 16 captures(none) dereferenceable(8) [[P1:%.*]], <2 x ptr addrspace(5)> [[PTRVEC:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[LOADVEC:%.*]] = load <2 x ptr addrspace(5)>, ptr [[P1]], align 16
; CHECK-NEXT: [[ICMPVEC:%.*]] = icmp eq <2 x ptr addrspace(5)> [[LOADVEC]], <ptr addrspace(5) addrspacecast (ptr addrspace(1) null to ptr addrspace(5)), ptr addrspace(5) addrspacecast (ptr addrspace(1) null to ptr addrspace(5))>
; CHECK-NEXT: [[ICMP:%.*]] = extractelement <2 x i1> [[ICMPVEC]], i32 1
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[ICMP]], ptr [[P0]], ptr null
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[SELECT]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%loadvec = load <2 x ptr addrspace(5)>, ptr %p1, align 16
%icmpvec = icmp eq <2 x ptr addrspace(5)> %loadvec, addrspacecast (<2 x ptr addrspace(1)> zeroinitializer to <2 x ptr addrspace(5)>)
%icmp = extractelement <2 x i1> %icmpvec, i32 1
%select = select i1 %icmp, ptr %p0, ptr null
%load = load i32, ptr %select, align 4
ret i32 %load
}

define i32 @addrspacecast_vec_ptr(ptr %p0, ptr %p1, <2 x ptr addrspace(5)> %ptrvec) {
; CHECK-LABEL: define i32 @addrspacecast_vec_ptr(
; CHECK-SAME: ptr nofree readonly captures(none) [[P0:%.*]], ptr nofree noundef nonnull readonly align 16 captures(none) dereferenceable(8) [[P1:%.*]], <2 x ptr addrspace(5)> [[PTRVEC:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[LOADVEC:%.*]] = load <2 x ptr addrspace(5)>, ptr [[P1]], align 16
; CHECK-NEXT: [[ICMPVEC:%.*]] = icmp eq <2 x ptr addrspace(5)> [[LOADVEC]], <ptr addrspace(5) addrspacecast (ptr null to ptr addrspace(5)), ptr addrspace(5) addrspacecast (ptr null to ptr addrspace(5))>
; CHECK-NEXT: [[ICMP:%.*]] = extractelement <2 x i1> [[ICMPVEC]], i32 1
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[ICMP]], ptr [[P0]], ptr null
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[SELECT]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%loadvec = load <2 x ptr addrspace(5)>, ptr %p1, align 16
%icmpvec = icmp eq <2 x ptr addrspace(5)> %loadvec, addrspacecast (<2 x ptr> zeroinitializer to <2 x ptr addrspace(5)>)
%icmp = extractelement <2 x i1> %icmpvec, i32 1
%select = select i1 %icmp, ptr %p0, ptr null
%load = load i32, ptr %select, align 4
ret i32 %load
}

2 changes: 2 additions & 0 deletions llvm/test/Transforms/Attributor/AMDGPU/lit.local.cfg
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@@ -0,0 +1,2 @@
if not "AMDGPU" in config.root.targets:
config.unsupported = True