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[X86][GlobalISel] Enable Trigonometric functions with libcall mapping #126931

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Merged
merged 6 commits into from
Feb 27, 2025

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JaydeepChauhan14
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llvmbot commented Feb 12, 2025

@llvm/pr-subscribers-llvm-globalisel

@llvm/pr-subscribers-backend-x86

Author: None (JaydeepChauhan14)

Changes

Patch is 80.40 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/126931.diff

11 Files Affected:

  • (modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+4-3)
  • (modified) llvm/test/CodeGen/X86/llvm.acos.ll (+194-32)
  • (modified) llvm/test/CodeGen/X86/llvm.asin.ll (+194-32)
  • (modified) llvm/test/CodeGen/X86/llvm.atan.ll (+194-32)
  • (modified) llvm/test/CodeGen/X86/llvm.atan2.ll (+266-42)
  • (added) llvm/test/CodeGen/X86/llvm.cos.ll (+110)
  • (modified) llvm/test/CodeGen/X86/llvm.cosh.ll (+194-32)
  • (added) llvm/test/CodeGen/X86/llvm.sin.ll (+110)
  • (modified) llvm/test/CodeGen/X86/llvm.sinh.ll (+194-32)
  • (modified) llvm/test/CodeGen/X86/llvm.tan.ll (+194-32)
  • (modified) llvm/test/CodeGen/X86/llvm.tanh.ll (+194-32)
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index c73179c4c9466..684580d6fca06 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -99,9 +99,10 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
       .widenScalarToNextPow2(0, /*Min=*/8)
       .clampScalar(0, s8, sMaxScalar);
 
-  getActionDefinitionsBuilder(G_LROUND).libcall();
-
-  getActionDefinitionsBuilder(G_LLROUND).libcall();
+  getActionDefinitionsBuilder({G_LROUND, G_LLROUND, G_FCOS, G_FCOSH, G_FACOS,
+                               G_FSIN, G_FSINH, G_FASIN, G_FTAN, G_FTANH,
+                               G_FATAN, G_FATAN2})
+      .libcall();
 
   // merge/unmerge
   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
diff --git a/llvm/test/CodeGen/X86/llvm.acos.ll b/llvm/test/CodeGen/X86/llvm.acos.ll
index 202fde8291930..bf1395d6239c9 100644
--- a/llvm/test/CodeGen/X86/llvm.acos.ll
+++ b/llvm/test/CodeGen/X86/llvm.acos.ll
@@ -1,63 +1,225 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; We don't handle fp16 and fp128 types for "-global-isel" so we allow fallbacks in these cases to SDAG.
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
 
 define half @use_acosf16(half %a) nounwind {
-; CHECK-LABEL: use_acosf16:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq __extendhfsf2@PLT
-; CHECK-NEXT:    callq acosf@PLT
-; CHECK-NEXT:    callq __truncsfhf2@PLT
-; CHECK-NEXT:    popq %rax
-; CHECK-NEXT:    retq
+; X86-LABEL: use_acosf16:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl %eax, (%esp)
+; X86-NEXT:    calll __gnu_h2f_ieee
+; X86-NEXT:    fstps (%esp)
+; X86-NEXT:    calll acosf
+; X86-NEXT:    fstps (%esp)
+; X86-NEXT:    calll __gnu_f2h_ieee
+; X86-NEXT:    addl $12, %esp
+; X86-NEXT:    retl
+;
+; X64-LABEL: use_acosf16:
+; X64:       # %bb.0:
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    callq __extendhfsf2@PLT
+; X64-NEXT:    callq acosf@PLT
+; X64-NEXT:    callq __truncsfhf2@PLT
+; X64-NEXT:    popq %rax
+; X64-NEXT:    retq
   %x = call half @llvm.acos.f16(half %a)
   ret half %x
 }
 
 define float @use_acosf32(float %a) nounwind {
-; CHECK-LABEL: use_acosf32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp acosf@PLT # TAILCALL
+; SDAG-X86-LABEL: use_acosf32:
+; SDAG-X86:       # %bb.0:
+; SDAG-X86-NEXT:    subl $12, %esp
+; SDAG-X86-NEXT:    flds {{[0-9]+}}(%esp)
+; SDAG-X86-NEXT:    fstps (%esp)
+; SDAG-X86-NEXT:    calll acosf
+; SDAG-X86-NEXT:    addl $12, %esp
+; SDAG-X86-NEXT:    retl
+;
+; SDAG-X64-LABEL: use_acosf32:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    jmp acosf@PLT # TAILCALL
+;
+; GISEL-X86-LABEL: use_acosf32:
+; GISEL-X86:       # %bb.0:
+; GISEL-X86-NEXT:    subl $12, %esp
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT:    movl %eax, (%esp)
+; GISEL-X86-NEXT:    calll acosf
+; GISEL-X86-NEXT:    addl $12, %esp
+; GISEL-X86-NEXT:    retl
+;
+; GISEL-X64-LABEL: use_acosf32:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    pushq %rax
+; GISEL-X64-NEXT:    callq acosf
+; GISEL-X64-NEXT:    popq %rax
+; GISEL-X64-NEXT:    retq
   %x = call float @llvm.acos.f32(float %a)
   ret float %x
 }
 
 define double @use_acosf64(double %a) nounwind {
-; CHECK-LABEL: use_acosf64:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp acos@PLT # TAILCALL
+; SDAG-X86-LABEL: use_acosf64:
+; SDAG-X86:       # %bb.0:
+; SDAG-X86-NEXT:    subl $12, %esp
+; SDAG-X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; SDAG-X86-NEXT:    fstpl (%esp)
+; SDAG-X86-NEXT:    calll acos
+; SDAG-X86-NEXT:    addl $12, %esp
+; SDAG-X86-NEXT:    retl
+;
+; SDAG-X64-LABEL: use_acosf64:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    jmp acos@PLT # TAILCALL
+;
+; GISEL-X86-LABEL: use_acosf64:
+; GISEL-X86:       # %bb.0:
+; GISEL-X86-NEXT:    subl $12, %esp
+; GISEL-X86-NEXT:    leal {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT:    movl 4(%eax), %eax
+; GISEL-X86-NEXT:    xorl %edx, %edx
+; GISEL-X86-NEXT:    addl %esp, %edx
+; GISEL-X86-NEXT:    movl %ecx, (%esp)
+; GISEL-X86-NEXT:    movl %eax, 4(%edx)
+; GISEL-X86-NEXT:    calll acos
+; GISEL-X86-NEXT:    addl $12, %esp
+; GISEL-X86-NEXT:    retl
+;
+; GISEL-X64-LABEL: use_acosf64:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    pushq %rax
+; GISEL-X64-NEXT:    callq acos
+; GISEL-X64-NEXT:    popq %rax
+; GISEL-X64-NEXT:    retq
   %x = call double @llvm.acos.f64(double %a)
   ret double %x
 }
 
 define x86_fp80 @use_acosf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_acosf80:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq $24, %rsp
-; CHECK-NEXT:    fldt 32(%rsp)
-; CHECK-NEXT:    fstpt (%rsp)
-; CHECK-NEXT:    callq acosl@PLT
-; CHECK-NEXT:    addq  $24, %rsp
-; CHECK-NEXT:    retq
+; X86-LABEL: use_acosf80:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    fldt {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpt (%esp)
+; X86-NEXT:    calll acosl
+; X86-NEXT:    addl $12, %esp
+; X86-NEXT:    retl
+;
+; SDAG-X64-LABEL: use_acosf80:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    subq $24, %rsp
+; SDAG-X64-NEXT:    fldt {{[0-9]+}}(%rsp)
+; SDAG-X64-NEXT:    fstpt (%rsp)
+; SDAG-X64-NEXT:    callq acosl@PLT
+; SDAG-X64-NEXT:    addq $24, %rsp
+; SDAG-X64-NEXT:    retq
+;
+; GISEL-X64-LABEL: use_acosf80:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    subq $24, %rsp
+; GISEL-X64-NEXT:    fldt {{[0-9]+}}(%rsp)
+; GISEL-X64-NEXT:    fstpt (%rsp)
+; GISEL-X64-NEXT:    callq acosl
+; GISEL-X64-NEXT:    addq $24, %rsp
+; GISEL-X64-NEXT:    retq
   %x = call x86_fp80 @llvm.acos.f80(x86_fp80 %a)
   ret x86_fp80 %x
 }
 
 define fp128 @use_acosfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_acosfp128:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp  acosf128@PLT # TAILCALL
+; X86-LABEL: use_acosfp128:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %edi
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    subl $20, %esp
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    calll acosl
+; X86-NEXT:    addl $28, %esp
+; X86-NEXT:    movl (%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT:    movl %edi, 12(%esi)
+; X86-NEXT:    movl %edx, 8(%esi)
+; X86-NEXT:    movl %ecx, 4(%esi)
+; X86-NEXT:    movl %eax, (%esi)
+; X86-NEXT:    movl %esi, %eax
+; X86-NEXT:    addl $20, %esp
+; X86-NEXT:    popl %esi
+; X86-NEXT:    popl %edi
+; X86-NEXT:    retl $4
+;
+; SDAG-X64-LABEL: use_acosfp128:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    jmp acosf128@PLT # TAILCALL
+;
+; GISEL-X64-LABEL: use_acosfp128:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    pushq %rax
+; GISEL-X64-NEXT:    callq acosf128
+; GISEL-X64-NEXT:    popq %rax
+; GISEL-X64-NEXT:    retq
   %x = call fp128 @llvm.acos.f128(fp128 %a)
   ret fp128 %x
 }
 
 define ppc_fp128 @use_acosppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_acosppc_fp128:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq acosl@PLT
-; CHECK-NEXT:    popq %rax
-; CHECK-NEXT:    retq
+; X86-LABEL: use_acosppc_fp128:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $92, %esp
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl (%esp)
+; X86-NEXT:    calll acosl
+; X86-NEXT:    fxch %st(1)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    addl $92, %esp
+; X86-NEXT:    retl
+;
+; X64-LABEL: use_acosppc_fp128:
+; X64:       # %bb.0:
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    callq acosl@PLT
+; X64-NEXT:    popq %rax
+; X64-NEXT:    retq
   %x = call ppc_fp128 @llvm.acos.ppcf128(ppc_fp128 %a)
   ret ppc_fp128 %x
 }
diff --git a/llvm/test/CodeGen/X86/llvm.asin.ll b/llvm/test/CodeGen/X86/llvm.asin.ll
index 1e047d01c703c..ddcf58a899240 100644
--- a/llvm/test/CodeGen/X86/llvm.asin.ll
+++ b/llvm/test/CodeGen/X86/llvm.asin.ll
@@ -1,63 +1,225 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; We don't handle fp16 and fp128 types for "-global-isel" so we allow fallbacks in these cases to SDAG.
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
 
 define half @use_asinf16(half %a) nounwind {
-; CHECK-LABEL: use_asinf16:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq __extendhfsf2@PLT
-; CHECK-NEXT:    callq asinf@PLT
-; CHECK-NEXT:    callq __truncsfhf2@PLT
-; CHECK-NEXT:    popq %rax
-; CHECK-NEXT:    retq
+; X86-LABEL: use_asinf16:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl %eax, (%esp)
+; X86-NEXT:    calll __gnu_h2f_ieee
+; X86-NEXT:    fstps (%esp)
+; X86-NEXT:    calll asinf
+; X86-NEXT:    fstps (%esp)
+; X86-NEXT:    calll __gnu_f2h_ieee
+; X86-NEXT:    addl $12, %esp
+; X86-NEXT:    retl
+;
+; X64-LABEL: use_asinf16:
+; X64:       # %bb.0:
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    callq __extendhfsf2@PLT
+; X64-NEXT:    callq asinf@PLT
+; X64-NEXT:    callq __truncsfhf2@PLT
+; X64-NEXT:    popq %rax
+; X64-NEXT:    retq
   %x = call half @llvm.asin.f16(half %a)
   ret half %x
 }
 
 define float @use_asinf32(float %a) nounwind {
-; CHECK-LABEL: use_asinf32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp asinf@PLT # TAILCALL
+; SDAG-X86-LABEL: use_asinf32:
+; SDAG-X86:       # %bb.0:
+; SDAG-X86-NEXT:    subl $12, %esp
+; SDAG-X86-NEXT:    flds {{[0-9]+}}(%esp)
+; SDAG-X86-NEXT:    fstps (%esp)
+; SDAG-X86-NEXT:    calll asinf
+; SDAG-X86-NEXT:    addl $12, %esp
+; SDAG-X86-NEXT:    retl
+;
+; SDAG-X64-LABEL: use_asinf32:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    jmp asinf@PLT # TAILCALL
+;
+; GISEL-X86-LABEL: use_asinf32:
+; GISEL-X86:       # %bb.0:
+; GISEL-X86-NEXT:    subl $12, %esp
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT:    movl %eax, (%esp)
+; GISEL-X86-NEXT:    calll asinf
+; GISEL-X86-NEXT:    addl $12, %esp
+; GISEL-X86-NEXT:    retl
+;
+; GISEL-X64-LABEL: use_asinf32:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    pushq %rax
+; GISEL-X64-NEXT:    callq asinf
+; GISEL-X64-NEXT:    popq %rax
+; GISEL-X64-NEXT:    retq
   %x = call float @llvm.asin.f32(float %a)
   ret float %x
 }
 
 define double @use_asinf64(double %a) nounwind {
-; CHECK-LABEL: use_asinf64:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp asin@PLT # TAILCALL
+; SDAG-X86-LABEL: use_asinf64:
+; SDAG-X86:       # %bb.0:
+; SDAG-X86-NEXT:    subl $12, %esp
+; SDAG-X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; SDAG-X86-NEXT:    fstpl (%esp)
+; SDAG-X86-NEXT:    calll asin
+; SDAG-X86-NEXT:    addl $12, %esp
+; SDAG-X86-NEXT:    retl
+;
+; SDAG-X64-LABEL: use_asinf64:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    jmp asin@PLT # TAILCALL
+;
+; GISEL-X86-LABEL: use_asinf64:
+; GISEL-X86:       # %bb.0:
+; GISEL-X86-NEXT:    subl $12, %esp
+; GISEL-X86-NEXT:    leal {{[0-9]+}}(%esp), %eax
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; GISEL-X86-NEXT:    movl 4(%eax), %eax
+; GISEL-X86-NEXT:    xorl %edx, %edx
+; GISEL-X86-NEXT:    addl %esp, %edx
+; GISEL-X86-NEXT:    movl %ecx, (%esp)
+; GISEL-X86-NEXT:    movl %eax, 4(%edx)
+; GISEL-X86-NEXT:    calll asin
+; GISEL-X86-NEXT:    addl $12, %esp
+; GISEL-X86-NEXT:    retl
+;
+; GISEL-X64-LABEL: use_asinf64:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    pushq %rax
+; GISEL-X64-NEXT:    callq asin
+; GISEL-X64-NEXT:    popq %rax
+; GISEL-X64-NEXT:    retq
   %x = call double @llvm.asin.f64(double %a)
   ret double %x
 }
 
 define x86_fp80 @use_asinf80(x86_fp80 %a) nounwind {
-; CHECK-LABEL: use_asinf80:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq $24, %rsp
-; CHECK-NEXT:    fldt 32(%rsp)
-; CHECK-NEXT:    fstpt (%rsp)
-; CHECK-NEXT:    callq asinl@PLT
-; CHECK-NEXT:    addq  $24, %rsp
-; CHECK-NEXT:    retq
+; X86-LABEL: use_asinf80:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    fldt {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpt (%esp)
+; X86-NEXT:    calll asinl
+; X86-NEXT:    addl $12, %esp
+; X86-NEXT:    retl
+;
+; SDAG-X64-LABEL: use_asinf80:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    subq $24, %rsp
+; SDAG-X64-NEXT:    fldt {{[0-9]+}}(%rsp)
+; SDAG-X64-NEXT:    fstpt (%rsp)
+; SDAG-X64-NEXT:    callq asinl@PLT
+; SDAG-X64-NEXT:    addq $24, %rsp
+; SDAG-X64-NEXT:    retq
+;
+; GISEL-X64-LABEL: use_asinf80:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    subq $24, %rsp
+; GISEL-X64-NEXT:    fldt {{[0-9]+}}(%rsp)
+; GISEL-X64-NEXT:    fstpt (%rsp)
+; GISEL-X64-NEXT:    callq asinl
+; GISEL-X64-NEXT:    addq $24, %rsp
+; GISEL-X64-NEXT:    retq
   %x = call x86_fp80 @llvm.asin.f80(x86_fp80 %a)
   ret x86_fp80 %x
 }
 
 define fp128 @use_asinfp128(fp128 %a) nounwind {
-; CHECK-LABEL: use_asinfp128:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp  asinf128@PLT # TAILCALL
+; X86-LABEL: use_asinfp128:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %edi
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    subl $20, %esp
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    leal {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl {{[0-9]+}}(%esp)
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    calll asinl
+; X86-NEXT:    addl $28, %esp
+; X86-NEXT:    movl (%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT:    movl %edi, 12(%esi)
+; X86-NEXT:    movl %edx, 8(%esi)
+; X86-NEXT:    movl %ecx, 4(%esi)
+; X86-NEXT:    movl %eax, (%esi)
+; X86-NEXT:    movl %esi, %eax
+; X86-NEXT:    addl $20, %esp
+; X86-NEXT:    popl %esi
+; X86-NEXT:    popl %edi
+; X86-NEXT:    retl $4
+;
+; SDAG-X64-LABEL: use_asinfp128:
+; SDAG-X64:       # %bb.0:
+; SDAG-X64-NEXT:    jmp asinf128@PLT # TAILCALL
+;
+; GISEL-X64-LABEL: use_asinfp128:
+; GISEL-X64:       # %bb.0:
+; GISEL-X64-NEXT:    pushq %rax
+; GISEL-X64-NEXT:    callq asinf128
+; GISEL-X64-NEXT:    popq %rax
+; GISEL-X64-NEXT:    retq
   %x = call fp128 @llvm.asin.f128(fp128 %a)
   ret fp128 %x
 }
 
 define ppc_fp128 @use_asinppc_fp128(ppc_fp128 %a) nounwind {
-; CHECK-LABEL: use_asinppc_fp128:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq asinl@PLT
-; CHECK-NEXT:    popq %rax
-; CHECK-NEXT:    retq
+; X86-LABEL: use_asinppc_fp128:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $92, %esp
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl (%esp)
+; X86-NEXT:    calll asinl
+; X86-NEXT:    fxch %st(1)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    fstpl {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    addl $92, %esp
+; X86-NEXT:    retl
+;
+; X64-LABEL: use_asinppc_fp128:
+; X64:       # %bb.0:
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    callq asinl@PLT
+; X64-NEXT:    popq %rax
+; X64-NEXT:    retq
   %x = call ppc_fp128 @llvm.asin.ppcf128(ppc_fp128 %a)
   ret ppc_fp128 %x
 }
diff --git a/llvm/test/CodeGen/X86/llvm.atan.ll b/llvm/test/CodeGen/X86/llvm.atan.ll
index d33ef7fd3ac5f..8e1403c2cb904 100644
--- a/llvm/test/CodeGen/X86/llvm.atan.ll
+++ b/llvm/test/CodeGen/X86/llvm.atan.ll
@@ -1,63 +1,225 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; We don't handle fp16 and fp128 types for "-global-isel" so we allow fallbacks in these cases to SDAG.
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,GISEL-X64
 
 define half @use_atanf16(half %a) nounwind {
-; CHECK-LABEL: use_atanf16:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq __extendhfsf2@PLT
-; CHECK-NEXT:    callq atanf@PLT
-; CHECK-NEXT:    callq __truncsfhf2@PLT
-; CHECK-NEXT:    popq %rax
-; CHECK-NEXT:    retq
+; X86-LABEL: use_atanf16:
+; X86:       # %bb.0:
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl %eax, (%esp)
+; X86-NEXT:    calll __gnu_h2f_ieee
+; X86-NEXT:    fstps (%esp)
+; X86-NEXT:    calll atanf
+; X86-NEXT:    fstps (%esp)
+; X86-NEXT:    calll __gnu_f2h_ieee
+; X86-NEXT:    addl $12, %esp
+; X86-NEXT:    retl
+;
+; X64-LABEL: use_atanf16:
+; X64:       # %bb.0:
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    callq __extendhfsf2@PLT
+; X64-NEXT:    callq atanf@PLT
+; X64-NEXT:    callq __truncsfhf2@PLT
+; X64-NEXT:    popq %rax
+; X64-NEXT:    retq
   %x = call half @llvm.atan.f16(half %a)
   ret half %x
 }
 
 define float @use_atanf32(float %a) nounwind {
-; CHECK-LABEL: use_atanf32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    jmp atanf@PLT # TAILCALL
+; SDAG-X86-LABEL: use_atanf32:
+; SDAG-X86:       # %bb.0:
+; SDAG-X86-NEXT:    subl $12, %esp
+; SDAG-X86-NEXT:    fl...
[truncated]

@JaydeepChauhan14
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@arsenm, @RKSimon, @e-kud please review PR.

@@ -1,63 +1,225 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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Most of the diff here is expanding the checks from x86_64 to also include i686, for both selectors. Better to precommit the additional target before adding the gisel runs

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Done

e-kud pushed a commit that referenced this pull request Feb 25, 2025
- Added sin/cos testcases.
- Added i686 checks for all testcases.
- Moved fp16 and fp128 cases into separate files.
- Dropped tests for ppc_fp128 type.
- Added global-isel runs as precommit testing for #126931
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LGTM

@arsenm arsenm merged commit 4c9f6a7 into llvm:main Feb 27, 2025
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joaosaffran pushed a commit to joaosaffran/llvm-project that referenced this pull request Mar 3, 2025
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5 participants