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[CUDA] Add support for sm101 and sm120 target architectures #127187

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Feb 19, 2025
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8 changes: 5 additions & 3 deletions clang/include/clang/Basic/BuiltinsNVPTX.td
Original file line number Diff line number Diff line change
Expand Up @@ -21,12 +21,14 @@ class SM<string version, list<SMFeatures> newer_list> : SMFeatures {
!strconcat(f, "|", newer.Features));
}

let Features = "sm_120a" in def SM_120a : SMFeatures;
let Features = "sm_101a" in def SM_101a : SMFeatures;
let Features = "sm_100a" in def SM_100a : SMFeatures;

def SM_100 : SM<"100", [SM_100a]>;

let Features = "sm_90a" in def SM_90a : SMFeatures;

def SM_120 : SM<"120", [SM_120a]>;
def SM_101 : SM<"101", [SM_101a, SM_120]>;
def SM_100 : SM<"100", [SM_100a, SM_101]>;
def SM_90 : SM<"90", [SM_90a, SM_100]>;
def SM_89 : SM<"89", [SM_90]>;
def SM_87 : SM<"87", [SM_89]>;
Expand Down
4 changes: 4 additions & 0 deletions clang/include/clang/Basic/Cuda.h
Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,10 @@ enum class OffloadArch {
SM_90a,
SM_100,
SM_100a,
SM_101,
SM_101a,
SM_120,
SM_120a,
GFX600,
GFX601,
GFX602,
Expand Down
8 changes: 8 additions & 0 deletions clang/lib/Basic/Cuda.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,10 @@ static const OffloadArchToStringMap arch_names[] = {
SM(90a), // Hopper
SM(100), // Blackwell
SM(100a), // Blackwell
SM(101), // Blackwell
SM(101a), // Blackwell
SM(120), // Blackwell
SM(120a), // Blackwell
GFX(600), // gfx600
GFX(601), // gfx601
GFX(602), // gfx602
Expand Down Expand Up @@ -230,6 +234,10 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
return CudaVersion::CUDA_120;
case OffloadArch::SM_100:
case OffloadArch::SM_100a:
case OffloadArch::SM_101:
case OffloadArch::SM_101a:
case OffloadArch::SM_120:
case OffloadArch::SM_120a:
return CudaVersion::CUDA_128;
default:
llvm_unreachable("invalid enum");
Expand Down
23 changes: 18 additions & 5 deletions clang/lib/Basic/Targets/NVPTX.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -185,7 +185,7 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,

if (Opts.CUDAIsDevice || Opts.OpenMPIsTargetDevice || !HostTarget) {
// Set __CUDA_ARCH__ for the GPU specified.
std::string CUDAArchCode = [this] {
llvm::StringRef CUDAArchCode = [this] {
switch (GPU) {
case OffloadArch::GFX600:
case OffloadArch::GFX601:
Expand Down Expand Up @@ -292,14 +292,27 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,
case OffloadArch::SM_100:
case OffloadArch::SM_100a:
return "1000";
case OffloadArch::SM_101:
case OffloadArch::SM_101a:
return "1010";
case OffloadArch::SM_120:
case OffloadArch::SM_120a:
return "1200";
}
llvm_unreachable("unhandled OffloadArch");
}();
Builder.defineMacro("__CUDA_ARCH__", CUDAArchCode);
if (GPU == OffloadArch::SM_90a)
Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
if (GPU == OffloadArch::SM_100a)
Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
switch(GPU) {
case OffloadArch::SM_90a:
case OffloadArch::SM_100a:
case OffloadArch::SM_101a:
case OffloadArch::SM_120a:
Builder.defineMacro("__CUDA_ARCH_FEAT_SM" + CUDAArchCode.drop_back() + "_ALL", "1");
break;
default:
// Do nothing if this is not an enhanced architecture.
break;
}
}
}

Expand Down
4 changes: 4 additions & 0 deletions clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2278,6 +2278,10 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const OMPRequiresDecl *D) {
case OffloadArch::SM_90a:
case OffloadArch::SM_100:
case OffloadArch::SM_100a:
case OffloadArch::SM_101:
case OffloadArch::SM_101a:
case OffloadArch::SM_120:
case OffloadArch::SM_120a:
case OffloadArch::GFX600:
case OffloadArch::GFX601:
case OffloadArch::GFX602:
Expand Down
4 changes: 4 additions & 0 deletions clang/test/Misc/target-invalid-cpu-note/nvptx.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,10 @@
// CHECK-SAME: {{^}}, sm_90a
// CHECK-SAME: {{^}}, sm_100
// CHECK-SAME: {{^}}, sm_100a
// CHECK-SAME: {{^}}, sm_101
// CHECK-SAME: {{^}}, sm_101a
// CHECK-SAME: {{^}}, sm_120
// CHECK-SAME: {{^}}, sm_120a
// CHECK-SAME: {{^}}, gfx600
// CHECK-SAME: {{^}}, gfx601
// CHECK-SAME: {{^}}, gfx602
Expand Down