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[RISCV] Use policy instead of ForceTailAgnostic for vmsbf/vmsif/vmsof pseudos. #127535

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Merged
merged 1 commit into from
Feb 18, 2025

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topperc
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@topperc topperc commented Feb 17, 2025

ForceTailAgnostic is currently treated as an override of the policy operand. It doesn't do anything else so we can just use the policy directly.

I'm going to see about removing the only other use of ForceTailAgnostic by adding a policy operand to those pseudos.

… pseudos.

ForceTailAgnostic is currently treated as an override of the policy
operand. It doesn't do anything else so we can just use the policy
directly.

I'm going to see about removing the only other use of ForceTailAgnostic
by adding a policy operand to those pseudos.
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llvmbot commented Feb 17, 2025

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

Changes

ForceTailAgnostic is currently treated as an override of the policy operand. It doesn't do anything else so we can just use the policy directly.

I'm going to see about removing the only other use of ForceTailAgnostic by adding a policy operand to those pseudos.


Full diff: https://github.com/llvm/llvm-project/pull/127535.diff

1 Files Affected:

  • (modified) llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td (+2-2)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 77f41e3c202c7..33c04d1c05613 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -122,6 +122,7 @@ def DecImm : SDNodeXForm<imm, [{
 
 defvar TAIL_AGNOSTIC = 1;
 defvar TU_MU = 0;
+defvar TA_MU = 1;
 defvar TA_MA = 3;
 
 //===----------------------------------------------------------------------===//
@@ -2029,7 +2030,6 @@ multiclass VPseudoVSFS_M {
       def "_M_" # mti.BX : VPseudoUnaryNoMaskNoPolicy<VR, VR, constraint>,
                            SchedUnary<"WriteVMSFSV", "ReadVMSFSV", mx,
                                       forcePassthruRead=true>;
-      let ForceTailAgnostic = true in
       def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMask<VR, VR, constraint,
                                                       sewop = sew_mask>,
                                      SchedUnary<"WriteVMSFSV", "ReadVMSFSV", mx,
@@ -4019,7 +4019,7 @@ class VPatMaskUnaryMask<string intrinsic_name,
                 (!cast<Instruction>(inst#"_M_"#mti.BX#"_MASK")
                 (mti.Mask VR:$passthru),
                 (mti.Mask VR:$rs2),
-                (mti.Mask VMV0:$vm), GPR:$vl, mti.Log2SEW, TU_MU)>;
+                (mti.Mask VMV0:$vm), GPR:$vl, mti.Log2SEW, TA_MU)>;
 
 class VPatUnaryAnyMask<string intrinsic,
                        string inst,

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LGTM. I don't think there's much point keeping around the TSFlag/optimisation in RISCVInsertVSETVLI if none of the intrinsics can manually set the policy.

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LGTM.
(If we remove ForceTailAgnostic, there will be a bubble in TSFlags, should we compact it?)

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topperc commented Feb 18, 2025

LGTM. (If we remove ForceTailAgnostic, there will be a bubble in TSFlags, should we compact it?)

If I'm able to remove ForceTailAgnostic, I will compact the TSFlags.

@topperc topperc merged commit 6ba34f9 into llvm:main Feb 18, 2025
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@topperc topperc deleted the pr/force-tail branch February 18, 2025 06:14
wldfngrs pushed a commit to wldfngrs/llvm-project that referenced this pull request Feb 19, 2025
… pseudos. (llvm#127535)

ForceTailAgnostic is currently treated as an override of the policy
operand. It doesn't do anything else so we can just use the policy
directly.
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4 participants