[Hexagon] Simplify an array of physical register ids. NFC

[topperc]

Make the array const. Use MCPhysReg, which is uint16_t, to reduce its size. Remove NoRegister terminator by using a range-based for loop to access.

[llvmbot]

@llvm/pr-subscribers-backend-hexagon

Author: Craig Topper (topperc)

Changes

Make the array const. Use MCPhysReg to reduce its size. Remove NoRegister terminator by using a range-based for loop to access.

---

Full diff: https://github.com/llvm/llvm-project/pull/128066.diff

1 Files Affected:

• (modified) llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp (+3-5)

diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index a35f7a3350f8c..eddf7500f0974 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1076,20 +1076,18 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
         .addCFIIndex(MF.addFrameInst(OffR30));
   }
 
-  static Register RegsToMove[] = {
+  static const MCPhysReg RegsToMove[] = {
     Hexagon::R1,  Hexagon::R0,  Hexagon::R3,  Hexagon::R2,
     Hexagon::R17, Hexagon::R16, Hexagon::R19, Hexagon::R18,
     Hexagon::R21, Hexagon::R20, Hexagon::R23, Hexagon::R22,
     Hexagon::R25, Hexagon::R24, Hexagon::R27, Hexagon::R26,
     Hexagon::D0,  Hexagon::D1,  Hexagon::D8,  Hexagon::D9,
-    Hexagon::D10, Hexagon::D11, Hexagon::D12, Hexagon::D13,
-    Hexagon::NoRegister
+    Hexagon::D10, Hexagon::D11, Hexagon::D12, Hexagon::D13
   };
 
   const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
 
-  for (unsigned i = 0; RegsToMove[i] != Hexagon::NoRegister; ++i) {
-    Register Reg = RegsToMove[i];
+  for (MCPhysReg Reg : RegsToMove) {
     auto IfR = [Reg] (const CalleeSavedInfo &C) -> bool {
       return C.getReg() == Reg;
     };

[github-actions]

⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:

git-clang-format --diff cc45365ab9065bc9e8ea48744f761b7ac30a5634 517718d591d040b6e8e40700fb890a07a4cea0c2 --extensions cpp -- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp

View the diff from clang-format here.

diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index eddf7500f0..d8e38c1b43 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1077,13 +1077,11 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
   }
 
   static const MCPhysReg RegsToMove[] = {
-    Hexagon::R1,  Hexagon::R0,  Hexagon::R3,  Hexagon::R2,
-    Hexagon::R17, Hexagon::R16, Hexagon::R19, Hexagon::R18,
-    Hexagon::R21, Hexagon::R20, Hexagon::R23, Hexagon::R22,
-    Hexagon::R25, Hexagon::R24, Hexagon::R27, Hexagon::R26,
-    Hexagon::D0,  Hexagon::D1,  Hexagon::D8,  Hexagon::D9,
-    Hexagon::D10, Hexagon::D11, Hexagon::D12, Hexagon::D13
-  };
+      Hexagon::R1,  Hexagon::R0,  Hexagon::R3,  Hexagon::R2,  Hexagon::R17,
+      Hexagon::R16, Hexagon::R19, Hexagon::R18, Hexagon::R21, Hexagon::R20,
+      Hexagon::R23, Hexagon::R22, Hexagon::R25, Hexagon::R24, Hexagon::R27,
+      Hexagon::R26, Hexagon::D0,  Hexagon::D1,  Hexagon::D8,  Hexagon::D9,
+      Hexagon::D10, Hexagon::D11, Hexagon::D12, Hexagon::D13};
 
   const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
 

[androm3da]

LGTM but someone else should approve