Add unsigned integer overloads for abs #128257
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This seems silly, but DXC supports unsigned integer versions of abs that are just no-ops. This adds the overloads for source compatability because apparently users actually use them... Fixes llvm#128249
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@llvm/pr-subscribers-hlsl @llvm/pr-subscribers-clang Author: Chris B (llvm-beanz) ChangesThis seems silly, but DXC supports unsigned integer versions of abs that are just no-ops. This adds the overloads for source compatability because apparently users actually use them... Fixes #128249 Full diff: https://github.com/llvm/llvm-project/pull/128257.diff 2 Files Affected:
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index f03b620eee142..02fb8ac81c2e8 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -58,6 +58,15 @@ int16_t3 abs(int16_t3);
_HLSL_AVAILABILITY(shadermodel, 6.2)
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
int16_t4 abs(int16_t4);
+
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t abs(uint16_t V) { return V; }
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t2 abs(uint16_t2 V) { return V; }
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t3 abs(uint16_t3 V) { return V; }
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t4 abs(uint16_t4 V) { return V; }
#endif
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
@@ -82,6 +91,11 @@ int3 abs(int3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
int4 abs(int4);
+constexpr uint abs(uint V) { return V; }
+constexpr uint2 abs(uint2 V) { return V; }
+constexpr uint3 abs(uint3 V) { return V; }
+constexpr uint4 abs(uint4 V) { return V; }
+
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
float abs(float);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
@@ -100,6 +114,11 @@ int64_t3 abs(int64_t3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
int64_t4 abs(int64_t4);
+constexpr uint64_t abs(uint64_t V) { return V; }
+constexpr uint64_t2 abs(uint64_t2 V) { return V; }
+constexpr uint64_t3 abs(uint64_t3 V) { return V; }
+constexpr uint64_t4 abs(uint64_t4 V) { return V; }
+
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double abs(double);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
diff --git a/clang/test/CodeGenHLSL/builtins/abs.hlsl b/clang/test/CodeGenHLSL/builtins/abs.hlsl
index a8456a715082e..e8a6ee0449571 100644
--- a/clang/test/CodeGenHLSL/builtins/abs.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/abs.hlsl
@@ -20,6 +20,34 @@ int16_t3 test_abs_int16_t3(int16_t3 p0) { return abs(p0); }
// NATIVE_HALF-LABEL: define noundef <4 x i16> @_Z17test_abs_int16_t4
// NATIVE_HALF: call <4 x i16> @llvm.abs.v4i16(
int16_t4 test_abs_int16_t4(int16_t4 p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca i16
+// NATIVE_HALF-NEXT: store i16 {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load i16, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret i16 [[Val]]
+uint16_t test_abs_uint64_t(uint16_t p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(<2 x i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca <2 x i16>
+// NATIVE_HALF-NEXT: store <2 x i16> {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load <2 x i16>, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret <2 x i16> [[Val]]
+uint16_t2 test_abs_uint64_t2(uint16_t2 p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(<3 x i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca <3 x i16>
+// NATIVE_HALF-NEXT: store <3 x i16> {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load <3 x i16>, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret <3 x i16> [[Val]]
+uint16_t3 test_abs_uint64_t3(uint16_t3 p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(<4 x i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca <4 x i16>
+// NATIVE_HALF-NEXT: store <4 x i16> {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load <4 x i16>, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret <4 x i16> [[Val]]
+uint16_t4 test_abs_uint64_t4(uint16_t4 p0) { return abs(p0); }
#endif // __HLSL_ENABLE_16_BIT
// NATIVE_HALF-LABEL: define noundef nofpclass(nan inf) half @_Z13test_abs_half
@@ -94,3 +122,60 @@ double3 test_abs_double3(double3 p0) { return abs(p0); }
// CHECK-LABEL: define noundef nofpclass(nan inf) <4 x double> @_Z16test_abs_double4
// CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.fabs.v4f64(
double4 test_abs_double4(double4 p0) { return abs(p0); }
+
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(i32
+// CHECK: [[Alloca:%.*]] = alloca i32
+// CHECK-NEXT: store i32 {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load i32, ptr [[Alloca]]
+// CHECK-NEXT: ret i32 [[Val]]
+uint test_abs_uint(uint p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<2 x i32
+// CHECK: [[Alloca:%.*]] = alloca <2 x i32>
+// CHECK-NEXT: store <2 x i32> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <2 x i32>, ptr [[Alloca]]
+// CHECK-NEXT: ret <2 x i32> [[Val]]
+uint2 test_abs_uint2(uint2 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<3 x i32
+// CHECK: [[Alloca:%.*]] = alloca <3 x i32>
+// CHECK-NEXT: store <3 x i32> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <3 x i32>, ptr [[Alloca]]
+// CHECK-NEXT: ret <3 x i32> [[Val]]
+uint3 test_abs_uint3(uint3 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<4 x i32
+// CHECK: [[Alloca:%.*]] = alloca <4 x i32>
+// CHECK-NEXT: store <4 x i32> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <4 x i32>, ptr [[Alloca]]
+// CHECK-NEXT: ret <4 x i32> [[Val]]
+uint4 test_abs_uint4(uint4 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(i64
+// CHECK: [[Alloca:%.*]] = alloca i64
+// CHECK-NEXT: store i64 {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load i64, ptr [[Alloca]]
+// CHECK-NEXT: ret i64 [[Val]]
+uint64_t test_abs_uint64_t(uint64_t p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<2 x i64
+// CHECK: [[Alloca:%.*]] = alloca <2 x i64>
+// CHECK-NEXT: store <2 x i64> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <2 x i64>, ptr [[Alloca]]
+// CHECK-NEXT: ret <2 x i64> [[Val]]
+uint64_t2 test_abs_uint64_t2(uint64_t2 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<3 x i64
+// CHECK: [[Alloca:%.*]] = alloca <3 x i64>
+// CHECK-NEXT: store <3 x i64> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <3 x i64>, ptr [[Alloca]]
+// CHECK-NEXT: ret <3 x i64> [[Val]]
+uint64_t3 test_abs_uint64_t3(uint64_t3 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<4 x i64
+// CHECK: [[Alloca:%.*]] = alloca <4 x i64>
+// CHECK-NEXT: store <4 x i64> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <4 x i64>, ptr [[Alloca]]
+// CHECK-NEXT: ret <4 x i64> [[Val]]
+uint64_t4 test_abs_uint64_t4(uint64_t4 p0) { return abs(p0); }
|
|
@llvm/pr-subscribers-backend-x86 Author: Chris B (llvm-beanz) ChangesThis seems silly, but DXC supports unsigned integer versions of abs that are just no-ops. This adds the overloads for source compatability because apparently users actually use them... Fixes #128249 Full diff: https://github.com/llvm/llvm-project/pull/128257.diff 2 Files Affected:
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index f03b620eee142..02fb8ac81c2e8 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -58,6 +58,15 @@ int16_t3 abs(int16_t3);
_HLSL_AVAILABILITY(shadermodel, 6.2)
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
int16_t4 abs(int16_t4);
+
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t abs(uint16_t V) { return V; }
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t2 abs(uint16_t2 V) { return V; }
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t3 abs(uint16_t3 V) { return V; }
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+constexpr uint16_t4 abs(uint16_t4 V) { return V; }
#endif
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
@@ -82,6 +91,11 @@ int3 abs(int3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
int4 abs(int4);
+constexpr uint abs(uint V) { return V; }
+constexpr uint2 abs(uint2 V) { return V; }
+constexpr uint3 abs(uint3 V) { return V; }
+constexpr uint4 abs(uint4 V) { return V; }
+
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
float abs(float);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
@@ -100,6 +114,11 @@ int64_t3 abs(int64_t3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
int64_t4 abs(int64_t4);
+constexpr uint64_t abs(uint64_t V) { return V; }
+constexpr uint64_t2 abs(uint64_t2 V) { return V; }
+constexpr uint64_t3 abs(uint64_t3 V) { return V; }
+constexpr uint64_t4 abs(uint64_t4 V) { return V; }
+
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double abs(double);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
diff --git a/clang/test/CodeGenHLSL/builtins/abs.hlsl b/clang/test/CodeGenHLSL/builtins/abs.hlsl
index a8456a715082e..e8a6ee0449571 100644
--- a/clang/test/CodeGenHLSL/builtins/abs.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/abs.hlsl
@@ -20,6 +20,34 @@ int16_t3 test_abs_int16_t3(int16_t3 p0) { return abs(p0); }
// NATIVE_HALF-LABEL: define noundef <4 x i16> @_Z17test_abs_int16_t4
// NATIVE_HALF: call <4 x i16> @llvm.abs.v4i16(
int16_t4 test_abs_int16_t4(int16_t4 p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca i16
+// NATIVE_HALF-NEXT: store i16 {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load i16, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret i16 [[Val]]
+uint16_t test_abs_uint64_t(uint16_t p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(<2 x i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca <2 x i16>
+// NATIVE_HALF-NEXT: store <2 x i16> {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load <2 x i16>, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret <2 x i16> [[Val]]
+uint16_t2 test_abs_uint64_t2(uint16_t2 p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(<3 x i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca <3 x i16>
+// NATIVE_HALF-NEXT: store <3 x i16> {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load <3 x i16>, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret <3 x i16> [[Val]]
+uint16_t3 test_abs_uint64_t3(uint16_t3 p0) { return abs(p0); }
+
+// NATIVE_HALF-LABEL: define {{.*}}hlsl3abs{{.*}}(<4 x i16
+// NATIVE_HALF: [[Alloca:%.*]] = alloca <4 x i16>
+// NATIVE_HALF-NEXT: store <4 x i16> {{%.*}}, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: [[Val:%.*]] = load <4 x i16>, ptr [[Alloca]]
+// NATIVE_HALF-NEXT: ret <4 x i16> [[Val]]
+uint16_t4 test_abs_uint64_t4(uint16_t4 p0) { return abs(p0); }
#endif // __HLSL_ENABLE_16_BIT
// NATIVE_HALF-LABEL: define noundef nofpclass(nan inf) half @_Z13test_abs_half
@@ -94,3 +122,60 @@ double3 test_abs_double3(double3 p0) { return abs(p0); }
// CHECK-LABEL: define noundef nofpclass(nan inf) <4 x double> @_Z16test_abs_double4
// CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.fabs.v4f64(
double4 test_abs_double4(double4 p0) { return abs(p0); }
+
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(i32
+// CHECK: [[Alloca:%.*]] = alloca i32
+// CHECK-NEXT: store i32 {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load i32, ptr [[Alloca]]
+// CHECK-NEXT: ret i32 [[Val]]
+uint test_abs_uint(uint p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<2 x i32
+// CHECK: [[Alloca:%.*]] = alloca <2 x i32>
+// CHECK-NEXT: store <2 x i32> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <2 x i32>, ptr [[Alloca]]
+// CHECK-NEXT: ret <2 x i32> [[Val]]
+uint2 test_abs_uint2(uint2 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<3 x i32
+// CHECK: [[Alloca:%.*]] = alloca <3 x i32>
+// CHECK-NEXT: store <3 x i32> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <3 x i32>, ptr [[Alloca]]
+// CHECK-NEXT: ret <3 x i32> [[Val]]
+uint3 test_abs_uint3(uint3 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<4 x i32
+// CHECK: [[Alloca:%.*]] = alloca <4 x i32>
+// CHECK-NEXT: store <4 x i32> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <4 x i32>, ptr [[Alloca]]
+// CHECK-NEXT: ret <4 x i32> [[Val]]
+uint4 test_abs_uint4(uint4 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(i64
+// CHECK: [[Alloca:%.*]] = alloca i64
+// CHECK-NEXT: store i64 {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load i64, ptr [[Alloca]]
+// CHECK-NEXT: ret i64 [[Val]]
+uint64_t test_abs_uint64_t(uint64_t p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<2 x i64
+// CHECK: [[Alloca:%.*]] = alloca <2 x i64>
+// CHECK-NEXT: store <2 x i64> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <2 x i64>, ptr [[Alloca]]
+// CHECK-NEXT: ret <2 x i64> [[Val]]
+uint64_t2 test_abs_uint64_t2(uint64_t2 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<3 x i64
+// CHECK: [[Alloca:%.*]] = alloca <3 x i64>
+// CHECK-NEXT: store <3 x i64> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <3 x i64>, ptr [[Alloca]]
+// CHECK-NEXT: ret <3 x i64> [[Val]]
+uint64_t3 test_abs_uint64_t3(uint64_t3 p0) { return abs(p0); }
+
+// CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(<4 x i64
+// CHECK: [[Alloca:%.*]] = alloca <4 x i64>
+// CHECK-NEXT: store <4 x i64> {{%.*}}, ptr [[Alloca]]
+// CHECK-NEXT: [[Val:%.*]] = load <4 x i64>, ptr [[Alloca]]
+// CHECK-NEXT: ret <4 x i64> [[Val]]
+uint64_t4 test_abs_uint64_t4(uint64_t4 p0) { return abs(p0); }
|
damyanp
approved these changes
Feb 22, 2025
farzonl
reviewed
Feb 22, 2025
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| // CHECK-LABEL: define {{.*}}hlsl3abs{{.*}}(i32 | ||
| // CHECK: [[Alloca:%.*]] = alloca i32 |
There was a problem hiding this comment.
should we maybe drop the -disable-llvm-passes so that we can see the constexpr optomize away the alloca, load and store?
There was a problem hiding this comment.
I don't think we should be testing the implementation of constexpr in this PR. That really just adds extra testing time without meaningfully adding coverage since constexpr is extensively tested in the compiler elsewhere.
If this were not a constexpr-able function we should have gotten an error elsewhere and boy would that be a big a surprise given what the function does!
farzonl
approved these changes
Feb 22, 2025
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This seems silly, but DXC supports unsigned integer versions of abs that are just no-ops. This adds the overloads for source compatability because apparently users actually use them...
Fixes #128249