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[RISCV] Mark {vl, vtype} as clobber in inline assembly #128636
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37 changes: 37 additions & 0 deletions
37
llvm/test/CodeGen/RISCV/rvv/vsetvl-cross-inline-asm-clobber.ll
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,37 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 | ||
| ; RUN: llc -mtriple=riscv64 -mcpu=sifive-x280 -verify-machineinstrs < %s | FileCheck %s | ||
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| define void @foo(<vscale x 8 x half> %0, <vscale x 8 x half> %1) { | ||
| ; CHECK-LABEL: foo: | ||
| ; CHECK: # %bb.0: # %entry | ||
| ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma | ||
| ; CHECK-NEXT: vmv.v.i v12, 0 | ||
| ; CHECK-NEXT: lui a0, 1 | ||
| ; CHECK-NEXT: addiw a0, a0, -1096 | ||
| ; CHECK-NEXT: vmv.v.i v16, 0 | ||
| ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma | ||
| ; CHECK-NEXT: #APP | ||
| ; CHECK-NEXT: vfmadd.vv v16, v12, v12 | ||
| ; CHECK-NEXT: #NO_APP | ||
| ; CHECK-NEXT: #APP | ||
| ; CHECK-NEXT: vfmadd.vv v16, v12, v12 | ||
| ; CHECK-NEXT: #NO_APP | ||
| ; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma | ||
| ; CHECK-NEXT: vse16.v v8, (zero) | ||
| ; CHECK-NEXT: ret | ||
| entry: | ||
| %2 = tail call i64 @llvm.riscv.vsetvli.i64(i64 3000, i64 0, i64 0) | ||
| %3 = tail call <vscale x 8 x float> asm sideeffect "vfmadd.vv $0, $1, $2", "=^vr,^vr,^vr,0,~{vl},~{vtype}"(<vscale x 8 x float> zeroinitializer, <vscale x 8 x float> zeroinitializer, <vscale x 8 x float> zeroinitializer) | ||
| %4 = tail call <vscale x 8 x float> asm sideeffect "vfmadd.vv $0, $1, $2", "=^vr,^vr,^vr,0,~{vl},~{vtype}"(<vscale x 8 x float> zeroinitializer, <vscale x 8 x float> zeroinitializer, <vscale x 8 x float> %3) | ||
| tail call void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half> %0, ptr null, i64 %2) | ||
| ret void | ||
| } | ||
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| ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) | ||
| declare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg) #0 | ||
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| ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: write) | ||
| declare void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half>, ptr nocapture, i64) #1 | ||
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| attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) } | ||
| attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,37 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 | ||
| ; RUN: llc -mtriple=riscv64 -mcpu=sifive-x280 -verify-machineinstrs < %s | FileCheck %s | ||
|
|
||
| define void @foo(<vscale x 8 x half> %0, <vscale x 8 x half> %1) { | ||
| ; CHECK-LABEL: foo: | ||
| ; CHECK: # %bb.0: # %entry | ||
| ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma | ||
| ; CHECK-NEXT: vmv.v.i v12, 0 | ||
| ; CHECK-NEXT: lui a0, 1 | ||
| ; CHECK-NEXT: addiw a0, a0, -1096 | ||
| ; CHECK-NEXT: vmv.v.i v16, 0 | ||
| ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma | ||
| ; CHECK-NEXT: #APP | ||
| ; CHECK-NEXT: vfmadd.vv v16, v12, v12 | ||
| ; CHECK-NEXT: #NO_APP | ||
| ; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma | ||
| ; CHECK-NEXT: #APP | ||
| ; CHECK-NEXT: vfmadd.vv v16, v12, v12 | ||
| ; CHECK-NEXT: #NO_APP | ||
| ; CHECK-NEXT: vse16.v v8, (zero) | ||
| ; CHECK-NEXT: ret | ||
| entry: | ||
| %2 = tail call i64 @llvm.riscv.vsetvli.i64(i64 3000, i64 0, i64 0) | ||
| %3 = tail call <vscale x 8 x float> asm sideeffect "vfmadd.vv $0, $1, $2", "=^vr,^vr,^vr,0"(<vscale x 8 x float> zeroinitializer, <vscale x 8 x float> zeroinitializer, <vscale x 8 x float> zeroinitializer) | ||
| %4 = tail call <vscale x 8 x float> asm sideeffect "vfmadd.vv $0, $1, $2", "=^vr,^vr,^vr,0"(<vscale x 8 x float> zeroinitializer, <vscale x 8 x float> zeroinitializer, <vscale x 8 x float> %3) | ||
| tail call void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half> %0, ptr null, i64 %2) | ||
| ret void | ||
| } | ||
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| ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) | ||
| declare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg) #0 | ||
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| ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: write) | ||
| declare void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half>, ptr nocapture, i64) #1 | ||
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| attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) } | ||
| attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) } |
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I think this implementation is better, just update it with your implementation.
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That doesn't work with the
targetattribute.