Skip to content

[AMDGPU] Verify SdwaSel value range #128898

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Feb 27, 2025
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 12 additions & 0 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4916,6 +4916,18 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
return false;
}

for (auto Op : {AMDGPU::OpName::src0_sel, AMDGPU::OpName::src1_sel,
AMDGPU::OpName::dst_sel}) {
const MachineOperand *MO = getNamedOperand(MI, Op);
if (!MO)
continue;
int64_t Imm = MO->getImm();
if (Imm < 0 || Imm > AMDGPU::SDWA::SdwaSel::DWORD) {
ErrInfo = "Invalid SDWA selection";
return false;
}
}

int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst);

for (int OpIdx : {DstIdx, Src0Idx, Src1Idx, Src2Idx}) {
Expand Down
22 changes: 22 additions & 0 deletions llvm/test/MachineVerifier/AMDGPU/verifier-sdwa-selection.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,22 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass=none -o - %s 2>&1 | FileCheck %s

# CHECK-COUNT-6: *** Bad machine code: Invalid SDWA selection ***
# CHECK-NOT: *** Bad machine code
# CHECK: LLVM ERROR: Found 6 machine code errors

---
name: invalid_sdwa_selection
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_LSHRREV_B32_sdwa 0, %0:vgpr_32, 0, %0:vgpr_32, 0, 1, 0, 7, 0, implicit $exec
%2:vgpr_32 = V_LSHRREV_B32_sdwa 0, %0:vgpr_32, 0, %0:vgpr_32, 0, 1, 0, -1, 0, implicit $exec
%3:vgpr_32 = V_LSHRREV_B32_sdwa 0, %0:vgpr_32, 0, %0:vgpr_32, 0, 7, 0, 6, 0, implicit $exec
%4:vgpr_32 = V_LSHRREV_B32_sdwa 0, %0:vgpr_32, 0, %0:vgpr_32, 0, -1, 0, 6, 0, implicit $exec
%5:vgpr_32 = V_LSHRREV_B32_sdwa 0, %0:vgpr_32, 0, %0:vgpr_32, 0, 0, 0, 0, 7, implicit $exec
%6:vgpr_32 = V_LSHRREV_B32_sdwa 0, %0:vgpr_32, 0, %0:vgpr_32, 0, 0, 0, 0, -1, implicit $exec

S_ENDPGM 0
...
Loading