[AMDGPU][True16][CodeGen] add v_cndmask_t16 to hazardmask #128912
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@llvm/pr-subscribers-backend-amdgpu Author: Brox Chen (broxigarchen) Changesadd v_cndmask_t16 to hazardmask Full diff: https://github.com/llvm/llvm-project/pull/128912.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 582da42a0dc4e..aaefe27b1324f 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -2994,7 +2994,9 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
switch (I.getOpcode()) {
case AMDGPU::V_ADDC_U32_e32:
case AMDGPU::V_ADDC_U32_dpp:
+ case AMDGPU::V_CNDMASK_B16_t16_e32:
case AMDGPU::V_CNDMASK_B16_fake16_e32:
+ case AMDGPU::V_CNDMASK_B16_t16_dpp:
case AMDGPU::V_CNDMASK_B16_fake16_dpp:
case AMDGPU::V_CNDMASK_B32_e32:
case AMDGPU::V_CNDMASK_B32_dpp:
@@ -3010,7 +3012,9 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
HazardReg == AMDGPU::VCC_HI;
case AMDGPU::V_ADDC_U32_e64:
case AMDGPU::V_ADDC_U32_e64_dpp:
+ case AMDGPU::V_CNDMASK_B16_t16_e64:
case AMDGPU::V_CNDMASK_B16_fake16_e64:
+ case AMDGPU::V_CNDMASK_B16_t16_e64_dpp:
case AMDGPU::V_CNDMASK_B16_fake16_e64_dpp:
case AMDGPU::V_CNDMASK_B32_e64:
case AMDGPU::V_CNDMASK_B32_e64_dpp:
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Sisyph
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ping! If there is no other comment for this one, I'll merge it tomorrow. Thanks! |
jayfoad
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Mar 14, 2025
arsenm
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add v_cndmask_t16 to hazardmask