[RISCV] Move RISCV vector load/store searchable tables from RISCVISelDAGToDAG.cpp to RISCVBaseInfo.cpp. NFC #129172
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…DAGToDAG.cpp to RISCVBaseInfo.cpp. NFC llvm-mca needs some of them for llvm#128978. I'm relying on -fdata-sections allowing these to be stripped from tools that don't need them like llvm-mc.
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@llvm/pr-subscribers-backend-risc-v Author: Craig Topper (topperc) Changesllvm-mca needs some of them for #128978. I'm relying on -ffunction-sections and -fdata-sections allowing these to be stripped from tools that don't need them like llvm-mc. Full diff: https://github.com/llvm/llvm-project/pull/129172.diff 4 Files Affected:
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
index 9c1c364c18549..1829291cd0348 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -39,6 +39,18 @@ using namespace RISCV;
#include "RISCVGenSearchableTables.inc"
} // namespace RISCVVInversePseudosTable
+namespace RISCV {
+#define GET_RISCVVSSEGTable_IMPL
+#define GET_RISCVVLSEGTable_IMPL
+#define GET_RISCVVLXSEGTable_IMPL
+#define GET_RISCVVSXSEGTable_IMPL
+#define GET_RISCVVLETable_IMPL
+#define GET_RISCVVSETable_IMPL
+#define GET_RISCVVLXTable_IMPL
+#define GET_RISCVVSXTable_IMPL
+#include "RISCVGenSearchableTables.inc"
+} // namespace RISCV
+
namespace RISCVABI {
ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
StringRef ABIName) {
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index 88435b2b52ca5..6a87ffd0c899a 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -666,6 +666,83 @@ struct PseudoInfo {
#include "RISCVGenSearchableTables.inc"
} // namespace RISCVVInversePseudosTable
+namespace RISCV {
+struct VLSEGPseudo {
+ uint16_t NF : 4;
+ uint16_t Masked : 1;
+ uint16_t Strided : 1;
+ uint16_t FF : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t Pseudo;
+};
+
+struct VLXSEGPseudo {
+ uint16_t NF : 4;
+ uint16_t Masked : 1;
+ uint16_t Ordered : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t IndexLMUL : 3;
+ uint16_t Pseudo;
+};
+
+struct VSSEGPseudo {
+ uint16_t NF : 4;
+ uint16_t Masked : 1;
+ uint16_t Strided : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t Pseudo;
+};
+
+struct VSXSEGPseudo {
+ uint16_t NF : 4;
+ uint16_t Masked : 1;
+ uint16_t Ordered : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t IndexLMUL : 3;
+ uint16_t Pseudo;
+};
+
+struct VLEPseudo {
+ uint16_t Masked : 1;
+ uint16_t Strided : 1;
+ uint16_t FF : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t Pseudo;
+};
+
+struct VSEPseudo {
+ uint16_t Masked :1;
+ uint16_t Strided : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t Pseudo;
+};
+
+struct VLX_VSXPseudo {
+ uint16_t Masked : 1;
+ uint16_t Ordered : 1;
+ uint16_t Log2SEW : 3;
+ uint16_t LMUL : 3;
+ uint16_t IndexLMUL : 3;
+ uint16_t Pseudo;
+};
+
+#define GET_RISCVVSSEGTable_DECL
+#define GET_RISCVVLSEGTable_DECL
+#define GET_RISCVVLXSEGTable_DECL
+#define GET_RISCVVSXSEGTable_DECL
+#define GET_RISCVVLETable_DECL
+#define GET_RISCVVSETable_DECL
+#define GET_RISCVVLXTable_DECL
+#define GET_RISCVVSXTable_DECL
+#include "RISCVGenSearchableTables.inc"
+} // namespace RISCV
+
} // namespace llvm
#endif
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 7ea4bd94c0065..f3cce950ed7b5 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -34,18 +34,6 @@ static cl::opt<bool> UsePseudoMovImm(
"constant materialization"),
cl::init(false));
-namespace llvm::RISCV {
-#define GET_RISCVVSSEGTable_IMPL
-#define GET_RISCVVLSEGTable_IMPL
-#define GET_RISCVVLXSEGTable_IMPL
-#define GET_RISCVVSXSEGTable_IMPL
-#define GET_RISCVVLETable_IMPL
-#define GET_RISCVVSETable_IMPL
-#define GET_RISCVVLXTable_IMPL
-#define GET_RISCVVSXTable_IMPL
-#include "RISCVGenSearchableTables.inc"
-} // namespace llvm::RISCV
-
void RISCVDAGToDAGISel::PreprocessISelDAG() {
SelectionDAG::allnodes_iterator Position = CurDAG->allnodes_end();
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
index bb786e4b2bb40..5048a80fdd18f 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
@@ -204,83 +204,6 @@ class RISCVDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
CodeGenOptLevel OptLevel);
};
-namespace RISCV {
-struct VLSEGPseudo {
- uint16_t NF : 4;
- uint16_t Masked : 1;
- uint16_t Strided : 1;
- uint16_t FF : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t Pseudo;
-};
-
-struct VLXSEGPseudo {
- uint16_t NF : 4;
- uint16_t Masked : 1;
- uint16_t Ordered : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t IndexLMUL : 3;
- uint16_t Pseudo;
-};
-
-struct VSSEGPseudo {
- uint16_t NF : 4;
- uint16_t Masked : 1;
- uint16_t Strided : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t Pseudo;
-};
-
-struct VSXSEGPseudo {
- uint16_t NF : 4;
- uint16_t Masked : 1;
- uint16_t Ordered : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t IndexLMUL : 3;
- uint16_t Pseudo;
-};
-
-struct VLEPseudo {
- uint16_t Masked : 1;
- uint16_t Strided : 1;
- uint16_t FF : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t Pseudo;
-};
-
-struct VSEPseudo {
- uint16_t Masked :1;
- uint16_t Strided : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t Pseudo;
-};
-
-struct VLX_VSXPseudo {
- uint16_t Masked : 1;
- uint16_t Ordered : 1;
- uint16_t Log2SEW : 3;
- uint16_t LMUL : 3;
- uint16_t IndexLMUL : 3;
- uint16_t Pseudo;
-};
-
-#define GET_RISCVVSSEGTable_DECL
-#define GET_RISCVVLSEGTable_DECL
-#define GET_RISCVVLXSEGTable_DECL
-#define GET_RISCVVSXSEGTable_DECL
-#define GET_RISCVVLETable_DECL
-#define GET_RISCVVSETable_DECL
-#define GET_RISCVVLXTable_DECL
-#define GET_RISCVVSXTable_DECL
-#include "RISCVGenSearchableTables.inc"
-} // namespace RISCV
-
} // namespace llvm
#endif
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✅ With the latest revision this PR passed the C/C++ code formatter. |
lukel97
approved these changes
Feb 28, 2025
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/30/builds/16598 Here is the relevant piece of the build log for the reference |
cheezeburglar
pushed a commit
to cheezeburglar/llvm-project
that referenced
this pull request
Feb 28, 2025
…DAGToDAG.cpp to RISCVBaseInfo.cpp. NFC (llvm#129172) llvm-mca needs some of them for llvm#128978. I'm relying on -ffunction-sections and -fdata-sections allowing these to be stripped from tools that don't need them like llvm-mc.
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llvm-mca needs some of them for #128978.
I'm relying on -ffunction-sections and -fdata-sections allowing these to be stripped from tools that don't need them like llvm-mc.