[mlir][spirv] Add definition for selected sample operations #129558
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@llvm/pr-subscribers-mlir-spirv @llvm/pr-subscribers-mlir Author: Igor Wodiany (IgWod-IMG) ChangesThis commit adds following three operations: ImageSampleImplicitLodOp, ImageSampleExplicitLodOp and ImageSampleProjDrefImplicitLodOp Patch is 84.76 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/129558.diff 10 Files Affected:
diff --git a/mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt b/mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt
index 9f57627c321fb..0e2b2af11346f 100644
--- a/mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt
+++ b/mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt
@@ -1,2 +1,3 @@
add_subdirectory(IR)
+add_subdirectory(Interfaces)
add_subdirectory(Transforms)
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index cafe140469570..d5359da2a590e 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -4274,242 +4274,245 @@ class SPIRV_OpCode<string name, int val> {
// Begin opcode section. Generated from SPIR-V spec; DO NOT MODIFY!
-def SPIRV_OC_OpNop : I32EnumAttrCase<"OpNop", 0>;
-def SPIRV_OC_OpUndef : I32EnumAttrCase<"OpUndef", 1>;
-def SPIRV_OC_OpSourceContinued : I32EnumAttrCase<"OpSourceContinued", 2>;
-def SPIRV_OC_OpSource : I32EnumAttrCase<"OpSource", 3>;
-def SPIRV_OC_OpSourceExtension : I32EnumAttrCase<"OpSourceExtension", 4>;
-def SPIRV_OC_OpName : I32EnumAttrCase<"OpName", 5>;
-def SPIRV_OC_OpMemberName : I32EnumAttrCase<"OpMemberName", 6>;
-def SPIRV_OC_OpString : I32EnumAttrCase<"OpString", 7>;
-def SPIRV_OC_OpLine : I32EnumAttrCase<"OpLine", 8>;
-def SPIRV_OC_OpExtension : I32EnumAttrCase<"OpExtension", 10>;
-def SPIRV_OC_OpExtInstImport : I32EnumAttrCase<"OpExtInstImport", 11>;
-def SPIRV_OC_OpExtInst : I32EnumAttrCase<"OpExtInst", 12>;
-def SPIRV_OC_OpMemoryModel : I32EnumAttrCase<"OpMemoryModel", 14>;
-def SPIRV_OC_OpEntryPoint : I32EnumAttrCase<"OpEntryPoint", 15>;
-def SPIRV_OC_OpExecutionMode : I32EnumAttrCase<"OpExecutionMode", 16>;
-def SPIRV_OC_OpCapability : I32EnumAttrCase<"OpCapability", 17>;
-def SPIRV_OC_OpTypeVoid : I32EnumAttrCase<"OpTypeVoid", 19>;
-def SPIRV_OC_OpTypeBool : I32EnumAttrCase<"OpTypeBool", 20>;
-def SPIRV_OC_OpTypeInt : I32EnumAttrCase<"OpTypeInt", 21>;
-def SPIRV_OC_OpTypeFloat : I32EnumAttrCase<"OpTypeFloat", 22>;
-def SPIRV_OC_OpTypeVector : I32EnumAttrCase<"OpTypeVector", 23>;
-def SPIRV_OC_OpTypeMatrix : I32EnumAttrCase<"OpTypeMatrix", 24>;
-def SPIRV_OC_OpTypeImage : I32EnumAttrCase<"OpTypeImage", 25>;
-def SPIRV_OC_OpTypeSampledImage : I32EnumAttrCase<"OpTypeSampledImage", 27>;
-def SPIRV_OC_OpTypeArray : I32EnumAttrCase<"OpTypeArray", 28>;
-def SPIRV_OC_OpTypeRuntimeArray : I32EnumAttrCase<"OpTypeRuntimeArray", 29>;
-def SPIRV_OC_OpTypeStruct : I32EnumAttrCase<"OpTypeStruct", 30>;
-def SPIRV_OC_OpTypePointer : I32EnumAttrCase<"OpTypePointer", 32>;
-def SPIRV_OC_OpTypeFunction : I32EnumAttrCase<"OpTypeFunction", 33>;
-def SPIRV_OC_OpTypeForwardPointer : I32EnumAttrCase<"OpTypeForwardPointer", 39>;
-def SPIRV_OC_OpConstantTrue : I32EnumAttrCase<"OpConstantTrue", 41>;
-def SPIRV_OC_OpConstantFalse : I32EnumAttrCase<"OpConstantFalse", 42>;
-def SPIRV_OC_OpConstant : I32EnumAttrCase<"OpConstant", 43>;
-def SPIRV_OC_OpConstantComposite : I32EnumAttrCase<"OpConstantComposite", 44>;
-def SPIRV_OC_OpConstantNull : I32EnumAttrCase<"OpConstantNull", 46>;
-def SPIRV_OC_OpSpecConstantTrue : I32EnumAttrCase<"OpSpecConstantTrue", 48>;
-def SPIRV_OC_OpSpecConstantFalse : I32EnumAttrCase<"OpSpecConstantFalse", 49>;
-def SPIRV_OC_OpSpecConstant : I32EnumAttrCase<"OpSpecConstant", 50>;
-def SPIRV_OC_OpSpecConstantComposite : I32EnumAttrCase<"OpSpecConstantComposite", 51>;
-def SPIRV_OC_OpSpecConstantOp : I32EnumAttrCase<"OpSpecConstantOp", 52>;
-def SPIRV_OC_OpFunction : I32EnumAttrCase<"OpFunction", 54>;
-def SPIRV_OC_OpFunctionParameter : I32EnumAttrCase<"OpFunctionParameter", 55>;
-def SPIRV_OC_OpFunctionEnd : I32EnumAttrCase<"OpFunctionEnd", 56>;
-def SPIRV_OC_OpFunctionCall : I32EnumAttrCase<"OpFunctionCall", 57>;
-def SPIRV_OC_OpVariable : I32EnumAttrCase<"OpVariable", 59>;
-def SPIRV_OC_OpLoad : I32EnumAttrCase<"OpLoad", 61>;
-def SPIRV_OC_OpStore : I32EnumAttrCase<"OpStore", 62>;
-def SPIRV_OC_OpCopyMemory : I32EnumAttrCase<"OpCopyMemory", 63>;
-def SPIRV_OC_OpAccessChain : I32EnumAttrCase<"OpAccessChain", 65>;
-def SPIRV_OC_OpPtrAccessChain : I32EnumAttrCase<"OpPtrAccessChain", 67>;
-def SPIRV_OC_OpInBoundsPtrAccessChain : I32EnumAttrCase<"OpInBoundsPtrAccessChain", 70>;
-def SPIRV_OC_OpDecorate : I32EnumAttrCase<"OpDecorate", 71>;
-def SPIRV_OC_OpMemberDecorate : I32EnumAttrCase<"OpMemberDecorate", 72>;
-def SPIRV_OC_OpVectorExtractDynamic : I32EnumAttrCase<"OpVectorExtractDynamic", 77>;
-def SPIRV_OC_OpVectorInsertDynamic : I32EnumAttrCase<"OpVectorInsertDynamic", 78>;
-def SPIRV_OC_OpVectorShuffle : I32EnumAttrCase<"OpVectorShuffle", 79>;
-def SPIRV_OC_OpCompositeConstruct : I32EnumAttrCase<"OpCompositeConstruct", 80>;
-def SPIRV_OC_OpCompositeExtract : I32EnumAttrCase<"OpCompositeExtract", 81>;
-def SPIRV_OC_OpCompositeInsert : I32EnumAttrCase<"OpCompositeInsert", 82>;
-def SPIRV_OC_OpTranspose : I32EnumAttrCase<"OpTranspose", 84>;
-def SPIRV_OC_OpImageDrefGather : I32EnumAttrCase<"OpImageDrefGather", 97>;
-def SPIRV_OC_OpImageWrite : I32EnumAttrCase<"OpImageWrite", 99>;
-def SPIRV_OC_OpImage : I32EnumAttrCase<"OpImage", 100>;
-def SPIRV_OC_OpImageQuerySize : I32EnumAttrCase<"OpImageQuerySize", 104>;
-def SPIRV_OC_OpConvertFToU : I32EnumAttrCase<"OpConvertFToU", 109>;
-def SPIRV_OC_OpConvertFToS : I32EnumAttrCase<"OpConvertFToS", 110>;
-def SPIRV_OC_OpConvertSToF : I32EnumAttrCase<"OpConvertSToF", 111>;
-def SPIRV_OC_OpConvertUToF : I32EnumAttrCase<"OpConvertUToF", 112>;
-def SPIRV_OC_OpUConvert : I32EnumAttrCase<"OpUConvert", 113>;
-def SPIRV_OC_OpSConvert : I32EnumAttrCase<"OpSConvert", 114>;
-def SPIRV_OC_OpFConvert : I32EnumAttrCase<"OpFConvert", 115>;
-def SPIRV_OC_OpConvertPtrToU : I32EnumAttrCase<"OpConvertPtrToU", 117>;
-def SPIRV_OC_OpConvertUToPtr : I32EnumAttrCase<"OpConvertUToPtr", 120>;
-def SPIRV_OC_OpPtrCastToGeneric : I32EnumAttrCase<"OpPtrCastToGeneric", 121>;
-def SPIRV_OC_OpGenericCastToPtr : I32EnumAttrCase<"OpGenericCastToPtr", 122>;
-def SPIRV_OC_OpGenericCastToPtrExplicit : I32EnumAttrCase<"OpGenericCastToPtrExplicit", 123>;
-def SPIRV_OC_OpBitcast : I32EnumAttrCase<"OpBitcast", 124>;
-def SPIRV_OC_OpSNegate : I32EnumAttrCase<"OpSNegate", 126>;
-def SPIRV_OC_OpFNegate : I32EnumAttrCase<"OpFNegate", 127>;
-def SPIRV_OC_OpIAdd : I32EnumAttrCase<"OpIAdd", 128>;
-def SPIRV_OC_OpFAdd : I32EnumAttrCase<"OpFAdd", 129>;
-def SPIRV_OC_OpISub : I32EnumAttrCase<"OpISub", 130>;
-def SPIRV_OC_OpFSub : I32EnumAttrCase<"OpFSub", 131>;
-def SPIRV_OC_OpIMul : I32EnumAttrCase<"OpIMul", 132>;
-def SPIRV_OC_OpFMul : I32EnumAttrCase<"OpFMul", 133>;
-def SPIRV_OC_OpUDiv : I32EnumAttrCase<"OpUDiv", 134>;
-def SPIRV_OC_OpSDiv : I32EnumAttrCase<"OpSDiv", 135>;
-def SPIRV_OC_OpFDiv : I32EnumAttrCase<"OpFDiv", 136>;
-def SPIRV_OC_OpUMod : I32EnumAttrCase<"OpUMod", 137>;
-def SPIRV_OC_OpSRem : I32EnumAttrCase<"OpSRem", 138>;
-def SPIRV_OC_OpSMod : I32EnumAttrCase<"OpSMod", 139>;
-def SPIRV_OC_OpFRem : I32EnumAttrCase<"OpFRem", 140>;
-def SPIRV_OC_OpFMod : I32EnumAttrCase<"OpFMod", 141>;
-def SPIRV_OC_OpVectorTimesScalar : I32EnumAttrCase<"OpVectorTimesScalar", 142>;
-def SPIRV_OC_OpMatrixTimesScalar : I32EnumAttrCase<"OpMatrixTimesScalar", 143>;
-def SPIRV_OC_OpVectorTimesMatrix : I32EnumAttrCase<"OpVectorTimesMatrix", 144>;
-def SPIRV_OC_OpMatrixTimesVector : I32EnumAttrCase<"OpMatrixTimesVector", 145>;
-def SPIRV_OC_OpMatrixTimesMatrix : I32EnumAttrCase<"OpMatrixTimesMatrix", 146>;
-def SPIRV_OC_OpDot : I32EnumAttrCase<"OpDot", 148>;
-def SPIRV_OC_OpIAddCarry : I32EnumAttrCase<"OpIAddCarry", 149>;
-def SPIRV_OC_OpISubBorrow : I32EnumAttrCase<"OpISubBorrow", 150>;
-def SPIRV_OC_OpUMulExtended : I32EnumAttrCase<"OpUMulExtended", 151>;
-def SPIRV_OC_OpSMulExtended : I32EnumAttrCase<"OpSMulExtended", 152>;
-def SPIRV_OC_OpIsNan : I32EnumAttrCase<"OpIsNan", 156>;
-def SPIRV_OC_OpIsInf : I32EnumAttrCase<"OpIsInf", 157>;
-def SPIRV_OC_OpOrdered : I32EnumAttrCase<"OpOrdered", 162>;
-def SPIRV_OC_OpUnordered : I32EnumAttrCase<"OpUnordered", 163>;
-def SPIRV_OC_OpLogicalEqual : I32EnumAttrCase<"OpLogicalEqual", 164>;
-def SPIRV_OC_OpLogicalNotEqual : I32EnumAttrCase<"OpLogicalNotEqual", 165>;
-def SPIRV_OC_OpLogicalOr : I32EnumAttrCase<"OpLogicalOr", 166>;
-def SPIRV_OC_OpLogicalAnd : I32EnumAttrCase<"OpLogicalAnd", 167>;
-def SPIRV_OC_OpLogicalNot : I32EnumAttrCase<"OpLogicalNot", 168>;
-def SPIRV_OC_OpSelect : I32EnumAttrCase<"OpSelect", 169>;
-def SPIRV_OC_OpIEqual : I32EnumAttrCase<"OpIEqual", 170>;
-def SPIRV_OC_OpINotEqual : I32EnumAttrCase<"OpINotEqual", 171>;
-def SPIRV_OC_OpUGreaterThan : I32EnumAttrCase<"OpUGreaterThan", 172>;
-def SPIRV_OC_OpSGreaterThan : I32EnumAttrCase<"OpSGreaterThan", 173>;
-def SPIRV_OC_OpUGreaterThanEqual : I32EnumAttrCase<"OpUGreaterThanEqual", 174>;
-def SPIRV_OC_OpSGreaterThanEqual : I32EnumAttrCase<"OpSGreaterThanEqual", 175>;
-def SPIRV_OC_OpULessThan : I32EnumAttrCase<"OpULessThan", 176>;
-def SPIRV_OC_OpSLessThan : I32EnumAttrCase<"OpSLessThan", 177>;
-def SPIRV_OC_OpULessThanEqual : I32EnumAttrCase<"OpULessThanEqual", 178>;
-def SPIRV_OC_OpSLessThanEqual : I32EnumAttrCase<"OpSLessThanEqual", 179>;
-def SPIRV_OC_OpFOrdEqual : I32EnumAttrCase<"OpFOrdEqual", 180>;
-def SPIRV_OC_OpFUnordEqual : I32EnumAttrCase<"OpFUnordEqual", 181>;
-def SPIRV_OC_OpFOrdNotEqual : I32EnumAttrCase<"OpFOrdNotEqual", 182>;
-def SPIRV_OC_OpFUnordNotEqual : I32EnumAttrCase<"OpFUnordNotEqual", 183>;
-def SPIRV_OC_OpFOrdLessThan : I32EnumAttrCase<"OpFOrdLessThan", 184>;
-def SPIRV_OC_OpFUnordLessThan : I32EnumAttrCase<"OpFUnordLessThan", 185>;
-def SPIRV_OC_OpFOrdGreaterThan : I32EnumAttrCase<"OpFOrdGreaterThan", 186>;
-def SPIRV_OC_OpFUnordGreaterThan : I32EnumAttrCase<"OpFUnordGreaterThan", 187>;
-def SPIRV_OC_OpFOrdLessThanEqual : I32EnumAttrCase<"OpFOrdLessThanEqual", 188>;
-def SPIRV_OC_OpFUnordLessThanEqual : I32EnumAttrCase<"OpFUnordLessThanEqual", 189>;
-def SPIRV_OC_OpFOrdGreaterThanEqual : I32EnumAttrCase<"OpFOrdGreaterThanEqual", 190>;
-def SPIRV_OC_OpFUnordGreaterThanEqual : I32EnumAttrCase<"OpFUnordGreaterThanEqual", 191>;
-def SPIRV_OC_OpShiftRightLogical : I32EnumAttrCase<"OpShiftRightLogical", 194>;
-def SPIRV_OC_OpShiftRightArithmetic : I32EnumAttrCase<"OpShiftRightArithmetic", 195>;
-def SPIRV_OC_OpShiftLeftLogical : I32EnumAttrCase<"OpShiftLeftLogical", 196>;
-def SPIRV_OC_OpBitwiseOr : I32EnumAttrCase<"OpBitwiseOr", 197>;
-def SPIRV_OC_OpBitwiseXor : I32EnumAttrCase<"OpBitwiseXor", 198>;
-def SPIRV_OC_OpBitwiseAnd : I32EnumAttrCase<"OpBitwiseAnd", 199>;
-def SPIRV_OC_OpNot : I32EnumAttrCase<"OpNot", 200>;
-def SPIRV_OC_OpBitFieldInsert : I32EnumAttrCase<"OpBitFieldInsert", 201>;
-def SPIRV_OC_OpBitFieldSExtract : I32EnumAttrCase<"OpBitFieldSExtract", 202>;
-def SPIRV_OC_OpBitFieldUExtract : I32EnumAttrCase<"OpBitFieldUExtract", 203>;
-def SPIRV_OC_OpBitReverse : I32EnumAttrCase<"OpBitReverse", 204>;
-def SPIRV_OC_OpBitCount : I32EnumAttrCase<"OpBitCount", 205>;
-def SPIRV_OC_OpEmitVertex : I32EnumAttrCase<"OpEmitVertex", 218>;
-def SPIRV_OC_OpEndPrimitive : I32EnumAttrCase<"OpEndPrimitive", 219>;
-def SPIRV_OC_OpControlBarrier : I32EnumAttrCase<"OpControlBarrier", 224>;
-def SPIRV_OC_OpMemoryBarrier : I32EnumAttrCase<"OpMemoryBarrier", 225>;
-def SPIRV_OC_OpAtomicExchange : I32EnumAttrCase<"OpAtomicExchange", 229>;
-def SPIRV_OC_OpAtomicCompareExchange : I32EnumAttrCase<"OpAtomicCompareExchange", 230>;
-def SPIRV_OC_OpAtomicCompareExchangeWeak : I32EnumAttrCase<"OpAtomicCompareExchangeWeak", 231>;
-def SPIRV_OC_OpAtomicIIncrement : I32EnumAttrCase<"OpAtomicIIncrement", 232>;
-def SPIRV_OC_OpAtomicIDecrement : I32EnumAttrCase<"OpAtomicIDecrement", 233>;
-def SPIRV_OC_OpAtomicIAdd : I32EnumAttrCase<"OpAtomicIAdd", 234>;
-def SPIRV_OC_OpAtomicISub : I32EnumAttrCase<"OpAtomicISub", 235>;
-def SPIRV_OC_OpAtomicSMin : I32EnumAttrCase<"OpAtomicSMin", 236>;
-def SPIRV_OC_OpAtomicUMin : I32EnumAttrCase<"OpAtomicUMin", 237>;
-def SPIRV_OC_OpAtomicSMax : I32EnumAttrCase<"OpAtomicSMax", 238>;
-def SPIRV_OC_OpAtomicUMax : I32EnumAttrCase<"OpAtomicUMax", 239>;
-def SPIRV_OC_OpAtomicAnd : I32EnumAttrCase<"OpAtomicAnd", 240>;
-def SPIRV_OC_OpAtomicOr : I32EnumAttrCase<"OpAtomicOr", 241>;
-def SPIRV_OC_OpAtomicXor : I32EnumAttrCase<"OpAtomicXor", 242>;
-def SPIRV_OC_OpPhi : I32EnumAttrCase<"OpPhi", 245>;
-def SPIRV_OC_OpLoopMerge : I32EnumAttrCase<"OpLoopMerge", 246>;
-def SPIRV_OC_OpSelectionMerge : I32EnumAttrCase<"OpSelectionMerge", 247>;
-def SPIRV_OC_OpLabel : I32EnumAttrCase<"OpLabel", 248>;
-def SPIRV_OC_OpBranch : I32EnumAttrCase<"OpBranch", 249>;
-def SPIRV_OC_OpBranchConditional : I32EnumAttrCase<"OpBranchConditional", 250>;
-def SPIRV_OC_OpKill : I32EnumAttrCase<"OpKill", 252>;
-def SPIRV_OC_OpReturn : I32EnumAttrCase<"OpReturn", 253>;
-def SPIRV_OC_OpReturnValue : I32EnumAttrCase<"OpReturnValue", 254>;
-def SPIRV_OC_OpUnreachable : I32EnumAttrCase<"OpUnreachable", 255>;
-def SPIRV_OC_OpGroupBroadcast : I32EnumAttrCase<"OpGroupBroadcast", 263>;
-def SPIRV_OC_OpGroupIAdd : I32EnumAttrCase<"OpGroupIAdd", 264>;
-def SPIRV_OC_OpGroupFAdd : I32EnumAttrCase<"OpGroupFAdd", 265>;
-def SPIRV_OC_OpGroupFMin : I32EnumAttrCase<"OpGroupFMin", 266>;
-def SPIRV_OC_OpGroupUMin : I32EnumAttrCase<"OpGroupUMin", 267>;
-def SPIRV_OC_OpGroupSMin : I32EnumAttrCase<"OpGroupSMin", 268>;
-def SPIRV_OC_OpGroupFMax : I32EnumAttrCase<"OpGroupFMax", 269>;
-def SPIRV_OC_OpGroupUMax : I32EnumAttrCase<"OpGroupUMax", 270>;
-def SPIRV_OC_OpGroupSMax : I32EnumAttrCase<"OpGroupSMax", 271>;
-def SPIRV_OC_OpNoLine : I32EnumAttrCase<"OpNoLine", 317>;
-def SPIRV_OC_OpModuleProcessed : I32EnumAttrCase<"OpModuleProcessed", 330>;
-def SPIRV_OC_OpGroupNonUniformElect : I32EnumAttrCase<"OpGroupNonUniformElect", 333>;
-def SPIRV_OC_OpGroupNonUniformBroadcast : I32EnumAttrCase<"OpGroupNonUniformBroadcast", 337>;
-def SPIRV_OC_OpGroupNonUniformBallot : I32EnumAttrCase<"OpGroupNonUniformBallot", 339>;
-def SPIRV_OC_OpGroupNonUniformBallotBitCount : I32EnumAttrCase<"OpGroupNonUniformBallotBitCount", 342>;
-def SPIRV_OC_OpGroupNonUniformBallotFindLSB : I32EnumAttrCase<"OpGroupNonUniformBallotFindLSB", 343>;
-def SPIRV_OC_OpGroupNonUniformBallotFindMSB : I32EnumAttrCase<"OpGroupNonUniformBallotFindMSB", 344>;
-def SPIRV_OC_OpGroupNonUniformShuffle : I32EnumAttrCase<"OpGroupNonUniformShuffle", 345>;
-def SPIRV_OC_OpGroupNonUniformShuffleXor : I32EnumAttrCase<"OpGroupNonUniformShuffleXor", 346>;
-def SPIRV_OC_OpGroupNonUniformShuffleUp : I32EnumAttrCase<"OpGroupNonUniformShuffleUp", 347>;
-def SPIRV_OC_OpGroupNonUniformShuffleDown : I32EnumAttrCase<"OpGroupNonUniformShuffleDown", 348>;
-def SPIRV_OC_OpGroupNonUniformIAdd : I32EnumAttrCase<"OpGroupNonUniformIAdd", 349>;
-def SPIRV_OC_OpGroupNonUniformFAdd : I32EnumAttrCase<"OpGroupNonUniformFAdd", 350>;
-def SPIRV_OC_OpGroupNonUniformIMul : I32EnumAttrCase<"OpGroupNonUniformIMul", 351>;
-def SPIRV_OC_OpGroupNonUniformFMul : I32EnumAttrCase<"OpGroupNonUniformFMul", 352>;
-def SPIRV_OC_OpGroupNonUniformSMin : I32EnumAttrCase<"OpGroupNonUniformSMin", 353>;
-def SPIRV_OC_OpGroupNonUniformUMin : I32EnumAttrCase<"OpGroupNonUniformUMin", 354>;
-def SPIRV_OC_OpGroupNonUniformFMin : I32EnumAttrCase<"OpGroupNonUniformFMin", 355>;
-def SPIRV_OC_OpGroupNonUniformSMax : I32EnumAttrCase<"OpGroupNonUniformSMax", 356>;
-def SPIRV_OC_OpGroupNonUniformUMax : I32EnumAttrCase<"OpGroupNonUniformUMax", 357>;
-def SPIRV_OC_OpGroupNonUniformFMax : I32EnumAttrCase<"OpGroupNonUniformFMax", 358>;
-def SPIRV_OC_OpGroupNonUniformBitwiseAnd : I32EnumAttrCase<"OpGroupNonUniformBitwiseAnd", 359>;
-def SPIRV_OC_OpGroupNonUniformBitwiseOr : I32EnumAttrCase<"OpGroupNonUniformBitwiseOr", 360>;
-def SPIRV_OC_OpGroupNonUniformBitwiseXor : I32EnumAttrCase<"OpGroupNonUniformBitwiseXor", 361>;
-def SPIRV_OC_OpGroupNonUniformLogicalAnd : I32EnumAttrCase<"OpGroupNonUniformLogicalAnd", 362>;
-def SPIRV_OC_OpGroupNonUniformLogicalOr : I32EnumAttrCase<"OpGroupNonUniformLogicalOr", 363>;
-def SPIRV_OC_OpGroupNonUniformLogicalXor : I32EnumAttrCase<"OpGroupNonUniformLogicalXor", 364>;
-def SPIRV_OC_OpSubgroupBallotKHR : I32EnumAttrCase<"OpSubgroupBallotKHR", 4421>;
-def SPIRV_OC_OpSDot : I32EnumAttrCase<"OpSDot", 4450>;
-def SPIRV_OC_OpUDot : I32EnumAttrCase<"OpUDot", 4451>;
-def SPIRV_OC_OpSUDot : I32EnumAttrCase<"OpSUDot", 4452>;
-def SPIRV_OC_OpSDotAccSat : I32EnumAttrCase<"OpSDotAccSat", 4453>;
-def SPIRV_OC_OpUDotAccSat : I32EnumAttrCase<"OpUDotAccSat", 4454>;
-def SPIRV_OC_OpSUDotAccSat : I32EnumAttrCase<"OpSUDotAccSat", 4455>;
-def SPIRV_OC_OpTypeCooperativeMatrixKHR : I32EnumAttrCase<"OpTypeCooperativeMatrixKHR", 4456>;
-def SPIRV_OC_OpCooperativeMatrixLoadKHR : I32EnumAttrCase<"OpCooperativeMatrixLoadKHR", 4457>;
-def SPIRV_OC_OpCooperativeMatrixStoreKHR : I32EnumAttrCase<"OpCooperativeMatrixStoreKHR", 4458>;
-def SPIRV_OC_OpCooperativeMatrixMulAddKHR : I32EnumAttrCase<"OpCooperativeMatrixMulAddKHR", 4459>;
-def SPIRV_OC_OpCooperativeMatrixLength...
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I've just noticed that builds failed. I'm going to address it tomorrow. I have run |
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Hi @IgWod-IMG, I have a fast approaching deadline this week and won't be able to review in the next few days. Please ping me if I forget to the back to this early next week. |
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| @@ -115,7 +121,7 @@ def SPIRV_ImageDrefGatherOp : SPIRV_Op<"ImageDrefGather", | |||
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| let assemblyFormat = [{ | |||
| $sampled_image `,` $coordinate `,` $dref custom<ImageOperands>($image_operands) ( `(` $operand_arguments^ `)` )? attr-dict | |||
| `:` type($sampled_image) `,` type($coordinate) `,` type($dref) ( `(` type($operand_arguments)^ `)` )? | |||
| `:` type($sampled_image) `,` type($coordinate) `,` type($dref) ` ` ( `(` type($operand_arguments)^ `)` )? | |||
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Is the addition of an explicit space here purely aesthetic?
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Yes, it's purely aesthetic. In #128552 I moved types of operands to the end of the operation, however in this PR I realised not having a space may be a bit confusing. For example:
%0 = spirv.ImageSampleImplicitLod %arg0, %arg1 ["Lod"](%arg2) : !spirv.sampled_image<...>, vector<2xf32>(f32) -> vector<4xf32>To me, without the space vector<2xf32>(f32) looks like those two are linked, but the intention is what f32 is the type of %arg2, which space makes a bit more clear: vector<2xf32> (f32). But maybe there is a better way to print type of image operands. I'm open to suggestions.
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Oh, I see! Indeed I had to stare at the version without the space a few times to realise what you meant, because I read them coupled in just the way you were worried about. This seems reasonable to me then. Maybe someone else can comment if there is a better way to do this, but in the absence of better ideas I think this is fine.
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Instead, could we anchor type($dref) on the preceding comma and print it like this:
%0 = spirv.ImageSampleImplicitLod %arg0, %arg1 ["Lod"](%arg2) : !spirv.sampled_image<...>, vector<2xf32>, f32 -> vector<4xf32>There was a problem hiding this comment.
Also, this seems like a change that we could land separately from the PR that primarily adds new ops?
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I was concerned it may be a bit misleading when there are multiple arguments for the operand, but looking at an example it works:
%0 = spirv.ImageSampleImplicitLod %arg0, %arg1 ["XXX"](%arg2, %arg2, %arg2) : !spirv.sampled_image<...>, vector<2xf32>, f32, f32, f32 -> vector<4xf32>An alternative would be having both comma and parentheses:
%0 = spirv.ImageSampleImplicitLod %arg0, %arg1 ["XXX"](%arg2, %arg2, %arg2) : !spirv.sampled_image<...>, vector<2xf32>, (f32, f32, f32) -> vector<4xf32>Anyway, I'll remove this change and the change to ImageWrite and submit it as a separate PR.
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General comment: why these three specifically? I can understand the logic to adding just the plain implicit and explicit LoD operations, as they're maybe the two most common and simplest sampling operations, but I'm not sure why you would also add just one operation out of the whole dref and proj family at the same time. I guess we strictly speaking do not have to add the whole set at once, but the piecemealness of it feels a little strange to me. |
andfau-amd
reviewed
Mar 7, 2025
andfau-amd
reviewed
Mar 7, 2025
There is a logic to this madness. We started using SPIR-V MLIR in a front-end of some of our internal research tools. So, what ops I add is driven by what content/benchmarks we are trying to support next. As it happens a set of shaders, I'm looking at now, needs those 3 image-related ops, so I decided to add them all in one go. Hope this make more sense now. |
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I've just pushed an updated patch addressing the feedback so far. |
andfau-amd
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Mar 10, 2025
kuhar
reviewed
Mar 10, 2025
| @@ -115,7 +121,7 @@ def SPIRV_ImageDrefGatherOp : SPIRV_Op<"ImageDrefGather", | |||
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| let assemblyFormat = [{ | |||
| $sampled_image `,` $coordinate `,` $dref custom<ImageOperands>($image_operands) ( `(` $operand_arguments^ `)` )? attr-dict | |||
| `:` type($sampled_image) `,` type($coordinate) `,` type($dref) ( `(` type($operand_arguments)^ `)` )? | |||
| `:` type($sampled_image) `,` type($coordinate) `,` type($dref) ` ` ( `(` type($operand_arguments)^ `)` )? | |||
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Instead, could we anchor type($dref) on the preceding comma and print it like this:
%0 = spirv.ImageSampleImplicitLod %arg0, %arg1 ["Lod"](%arg2) : !spirv.sampled_image<...>, vector<2xf32>, f32 -> vector<4xf32>| @@ -227,7 +233,7 @@ def SPIRV_ImageWriteOp : SPIRV_Op<"ImageWrite", | |||
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| let assemblyFormat = [{ | |||
| $image `,` $coordinate `,` $texel custom<ImageOperands>($image_operands) ( `(` $operand_arguments^ `)`)? attr-dict | |||
| `:` type($image) `,` type($coordinate) `,` type($texel) ( `(` type($operand_arguments)^ `)`)? | |||
| `:` type($image) `,` type($coordinate) `,` type($texel) ` ` ( `(` type($operand_arguments)^ `)`)? | |||
| @@ -115,7 +121,7 @@ def SPIRV_ImageDrefGatherOp : SPIRV_Op<"ImageDrefGather", | |||
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| let assemblyFormat = [{ | |||
| $sampled_image `,` $coordinate `,` $dref custom<ImageOperands>($image_operands) ( `(` $operand_arguments^ `)` )? attr-dict | |||
| `:` type($sampled_image) `,` type($coordinate) `,` type($dref) ( `(` type($operand_arguments)^ `)` )? | |||
| `:` type($sampled_image) `,` type($coordinate) `,` type($dref) ` ` ( `(` type($operand_arguments)^ `)` )? | |||
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Also, this seems like a change that we could land separately from the PR that primarily adds new ops?
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| `:` type($sampled_image) `,` type($coordinate) ` ` ( `(` type($operand_arguments)^ `)` )? | ||
| `->` type($result) |
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nit: indent this?
Suggested change
| `:` type($sampled_image) `,` type($coordinate) ` ` ( `(` type($operand_arguments)^ `)` )? | |
| `->` type($result) | |
| `:` type($sampled_image) `,` type($coordinate) ` ` ( `(` type($operand_arguments)^ `)` )? | |
| `->` type($result) |
| #### Example: | ||
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| ```mlir | ||
| %result = spirv.ImageSampleExplicitLod %image, %coord ["Lod"](%lod) : !spirv.sampled_image<!spirv.image<f32, Dim2D, NoDepth, NonArrayed, SingleSampled, NeedSampler, Unknown>>, vector<2xf32> (f32) -> vector<4xf32> |
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nit: break this line to fit the 80-ish column limit. For example, you can put the type on its own line
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I split it into:
%result = spirv.ImageSampleExplicitLod %image, %coord ["Lod"](%lod) :
!spirv.sampled_image<!spirv.image<f32, Dim2D, NoDepth, NonArrayed, SingleSampled, NeedSampler, Unknown>>,
vector<2xf32> (f32) -> vector<4xf32>It's ~110 characters but roughly fits the rest of the file. I'm happy to split it further if we want to get closer to the 80 characters limit.
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| def SPIRV_ExplicitLodOpInterface : OpInterface<"ExplicitLodOpInterface", [SPIRV_SampleOpInterface]> { | ||
| let description = [{ | ||
| The `ExplicitLodOpInterface` defines explicit sampling lod operations (.*ExplicitLod). Currently |
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| def SPIRV_ImplicitLodOpInterface : OpInterface<"ImplicitLodOpInterface", [SPIRV_SampleOpInterface]> { | ||
| let description = [{ | ||
| The `ImplicitLodOpInterface` defines implicit sampling lod operations (.*ImplicitLod). Currently |
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| The `FetchOpInterface` defines fetch image operations (OpImageFetch and | ||
| OpImageSpareFetch) and provides interface methods to query operands common |
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| } else | ||
| return imageOp->emitError( | ||
| "Grad arguments must be a scalar or vector of floating-point type"); | ||
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| } else | |
| return imageOp->emitError( | |
| "Grad arguments must be a scalar or vector of floating-point type"); | |
| } else { | |
| return imageOp->emitError( | |
| "Grad arguments must be a scalar or vector of floating-point type"); | |
| } |
If you use braces in one path, make sure to also add it to all the other ones
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| } else | ||
| numberOfComponents = 1; |
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| } else | |
| numberOfComponents = 1; | |
| } else { | |
| numberOfComponents = 1; | |
| } |
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I've pushed an updated patch addressing the feedback. I'll create a separate PR with changes to the assembly format shortly. |
This commit adds following three operations: ImageSampleImplicitLodOp, ImageSampleExplicitLodOp and ImageSampleProjDrefImplicitLodOp
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Apologies for a delay, I had a nasty cold last week. I have now merged #130758 and updated this PR with the agreed assembly format. Anything else please let me know, otherwise it's ready to be merged. |
kuhar
approved these changes
Mar 24, 2025
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Is this a circular dep? IR depends on Interfaces (SPIRVOps.h includes SPIRVImageInterfaces.h) but Interfaces also depends on IR (SPIRVImageInterfaces.td includes SPIRVBase.td) However, maybe it's just that bazel globs too much together, e.g. maybe some of the base files should be in individual targets, instead of just throwing .h/.cpp into a single target. https://llvm.org/docs/CodingStandards.html#library-layering is the overall LLVM ref, but I don't know if that applies to MLIR in this way. |
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@IgWod-IMG could you take a look at the bazel issue above? |
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Proposed fix: #132785 |
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Looking at it now! I've been actually working on the fix myself, just haven't got a time to reply to the thread. |
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This commit adds following three operations: ImageSampleImplicitLodOp, ImageSampleExplicitLodOp and ImageSampleProjDrefImplicitLodOp