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[CodeGen][NPM] Port PatchableFunction to NPM #129866
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[CodeGen][NPM] Port PatchableFunction to NPM #129866
optimisan
merged 2 commits into
main
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users/optimisan/postbb/port-patchable-function
Mar 12, 2025
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@llvm/pr-subscribers-backend-aarch64 Author: Akshat Oke (optimisan) ChangesFull diff: https://github.com/llvm/llvm-project/pull/129866.diff 8 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/PatchableFunction.h b/llvm/include/llvm/CodeGen/PatchableFunction.h
new file mode 100644
index 0000000000000..d81a92f9eef26
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/PatchableFunction.h
@@ -0,0 +1,30 @@
+//===- llvm/CodeGen/PatchableFunction.h -------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_PATCHABLEFUNCTION_H
+#define LLVM_CODEGEN_PATCHABLEFUNCTION_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class PatchableFunctionPass : public PassInfoMixin<PatchableFunctionPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+
+ MachineFunctionProperties getRequiredProperties() const {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::NoVRegs);
+ }
+ static bool isRequired() { return true; }
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_PATCHABLEFUNCTION_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 75992aea07a73..60b4b4d79a68f 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -225,7 +225,7 @@ void initializeOptimizePHIsLegacyPass(PassRegistry &);
void initializePEIPass(PassRegistry &);
void initializePHIEliminationPass(PassRegistry &);
void initializePartiallyInlineLibCallsLegacyPassPass(PassRegistry &);
-void initializePatchableFunctionPass(PassRegistry &);
+void initializePatchableFunctionLegacyPass(PassRegistry &);
void initializePeepholeOptimizerLegacyPass(PassRegistry &);
void initializePhiValuesWrapperPassPass(PassRegistry &);
void initializePhysicalRegisterUsageInfoWrapperLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 39df80a6b13ed..a354dfe9967f3 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -60,6 +60,7 @@
#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/CodeGen/OptimizePHIs.h"
#include "llvm/CodeGen/PHIElimination.h"
+#include "llvm/CodeGen/PatchableFunction.h"
#include "llvm/CodeGen/PeepholeOptimizer.h"
#include "llvm/CodeGen/PostRASchedulerList.h"
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 3e2ead944dd7e..ed37500ceef48 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -153,6 +153,7 @@ MACHINE_FUNCTION_PASS("machine-scheduler", MachineSchedulerPass(TM))
MACHINE_FUNCTION_PASS("machinelicm", MachineLICMPass())
MACHINE_FUNCTION_PASS("no-op-machine-function", NoOpMachineFunctionPass())
MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass())
+MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass())
MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass())
MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass())
MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass(TM))
@@ -279,7 +280,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machine-sanmd", MachineSanitizerBinaryMetadata)
DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
-DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index d2b70539a95ef..1fe83b7e1f9c7 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -103,7 +103,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeOptimizePHIsLegacyPass(Registry);
initializePEIPass(Registry);
initializePHIEliminationPass(Registry);
- initializePatchableFunctionPass(Registry);
+ initializePatchableFunctionLegacyPass(Registry);
initializePeepholeOptimizerLegacyPass(Registry);
initializePostMachineSchedulerLegacyPass(Registry);
initializePostRAHazardRecognizerPass(Registry);
diff --git a/llvm/lib/CodeGen/PatchableFunction.cpp b/llvm/lib/CodeGen/PatchableFunction.cpp
index 75c2dfeca58d5..07e6c1d90e786 100644
--- a/llvm/lib/CodeGen/PatchableFunction.cpp
+++ b/llvm/lib/CodeGen/PatchableFunction.cpp
@@ -11,6 +11,7 @@
//
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/PatchableFunction.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -23,21 +24,37 @@
using namespace llvm;
namespace {
-struct PatchableFunction : public MachineFunctionPass {
- static char ID; // Pass identification, replacement for typeid
- PatchableFunction() : MachineFunctionPass(ID) {
- initializePatchableFunctionPass(*PassRegistry::getPassRegistry());
+struct PatchableFunction {
+ bool run(MachineFunction &F);
+};
+
+struct PatchableFunctionLegacy : public MachineFunctionPass {
+ static char ID;
+ PatchableFunctionLegacy() : MachineFunctionPass(ID) {
+ initializePatchableFunctionLegacyPass(*PassRegistry::getPassRegistry());
+ }
+ bool runOnMachineFunction(MachineFunction &F) override {
+ return PatchableFunction().run(F);
}
- bool runOnMachineFunction(MachineFunction &F) override;
- MachineFunctionProperties getRequiredProperties() const override {
+ MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoVRegs);
}
};
+
+} // namespace
+
+PreservedAnalyses
+PatchableFunctionPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ MFPropsModifier _(*this, MF);
+ if (!PatchableFunction().run(MF))
+ return PreservedAnalyses::all();
+ return getMachineFunctionPassPreservedAnalyses();
}
-bool PatchableFunction::runOnMachineFunction(MachineFunction &MF) {
+bool PatchableFunction::run(MachineFunction &MF) {
MachineBasicBlock &FirstMBB = *MF.begin();
if (MF.getFunction().hasFnAttribute("patchable-function-entry")) {
@@ -62,7 +79,7 @@ bool PatchableFunction::runOnMachineFunction(MachineFunction &MF) {
return false;
}
-char PatchableFunction::ID = 0;
-char &llvm::PatchableFunctionID = PatchableFunction::ID;
-INITIALIZE_PASS(PatchableFunction, "patchable-function",
+char PatchableFunctionLegacy::ID = 0;
+char &llvm::PatchableFunctionID = PatchableFunctionLegacy::ID;
+INITIALIZE_PASS(PatchableFunctionLegacy, "patchable-function",
"Implement the 'patchable-function' attribute", false, false)
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 7ea6951df47d6..aed174965c77f 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -131,6 +131,7 @@
#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/CodeGen/OptimizePHIs.h"
#include "llvm/CodeGen/PHIElimination.h"
+#include "llvm/CodeGen/PatchableFunction.h"
#include "llvm/CodeGen/PeepholeOptimizer.h"
#include "llvm/CodeGen/PostRASchedulerList.h"
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
diff --git a/llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir b/llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir
index 2db89d210316d..f562a4fce3d74 100644
--- a/llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir
+++ b/llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=aarch64 -run-pass=patchable-function %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64 -passes=patchable-function %s -o - | FileCheck %s
## The initial .loc covers PATCHABLE_FUNCTION_ENTER.
## Emitting a new .loc may create a prologue_end prematurely.
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