Skip to content

[AMDGPU] Remove RegisterEncoding from SIInsertWaitcnts. NFC. #130056

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Mar 6, 2025
Merged

[AMDGPU] Remove RegisterEncoding from SIInsertWaitcnts. NFC. #130056

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
39 changes: 9 additions & 30 deletions llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -103,13 +103,6 @@ struct HardwareLimits {
unsigned KmcntMax; // gfx12+ only.
};

struct RegisterEncoding {
unsigned VGPR0;
unsigned VGPRL;
unsigned SGPR0;
unsigned SGPRL;
};

enum WaitEventType {
VMEM_ACCESS, // vector-memory read & write
VMEM_READ_ACCESS, // vector-memory read
Expand Down Expand Up @@ -254,11 +247,10 @@ InstCounterType eventCounter(const unsigned *masks, WaitEventType E) {
class WaitcntBrackets {
public:
WaitcntBrackets(const GCNSubtarget *SubTarget, InstCounterType MaxCounter,
HardwareLimits Limits, RegisterEncoding Encoding,
const unsigned *WaitEventMaskForInst,
HardwareLimits Limits, const unsigned *WaitEventMaskForInst,
InstCounterType SmemAccessCounter)
: ST(SubTarget), MaxCounter(MaxCounter), Limits(Limits),
Encoding(Encoding), WaitEventMaskForInst(WaitEventMaskForInst),
WaitEventMaskForInst(WaitEventMaskForInst),
SmemAccessCounter(SmemAccessCounter) {}

unsigned getWaitCountMax(InstCounterType T) const {
Expand Down Expand Up @@ -428,7 +420,6 @@ class WaitcntBrackets {
const GCNSubtarget *ST = nullptr;
InstCounterType MaxCounter = NUM_EXTENDED_INST_CNTS;
HardwareLimits Limits = {};
RegisterEncoding Encoding = {};
const unsigned *WaitEventMaskForInst;
InstCounterType SmemAccessCounter;
unsigned ScoreLBs[NUM_INST_CNTS] = {0};
Expand Down Expand Up @@ -761,16 +752,14 @@ RegInterval WaitcntBrackets::getRegInterval(const MachineInstr *MI,
AMDGPU::HWEncoding::REG_IDX_MASK;

if (TRI->isVectorRegister(*MRI, Op.getReg())) {
assert(Reg >= Encoding.VGPR0 && Reg <= Encoding.VGPRL);
Result.first = Reg - Encoding.VGPR0;
assert(Reg <= SQ_MAX_PGM_VGPRS);
Result.first = Reg;
if (TRI->isAGPR(*MRI, Op.getReg()))
Result.first += AGPR_OFFSET;
assert(Result.first >= 0 && Result.first < SQ_MAX_PGM_VGPRS);
} else if (TRI->isSGPRReg(*MRI, Op.getReg())) {
assert(Reg >= Encoding.SGPR0 && Reg < SQ_MAX_PGM_SGPRS);
Result.first = Reg - Encoding.SGPR0 + NUM_ALL_VGPRS;
assert(Result.first >= NUM_ALL_VGPRS &&
Result.first < SQ_MAX_PGM_SGPRS + NUM_ALL_VGPRS);
assert(Reg < SQ_MAX_PGM_SGPRS);
Result.first = Reg + NUM_ALL_VGPRS;
}
// TODO: Handle TTMP
// else if (TRI->isTTMP(*MRI, Reg.getReg())) ...
Expand Down Expand Up @@ -2454,14 +2443,6 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
assert(NumVGPRsMax <= SQ_MAX_PGM_VGPRS);
assert(NumSGPRsMax <= SQ_MAX_PGM_SGPRS);

RegisterEncoding Encoding = {};
Encoding.VGPR0 =
TRI->getEncodingValue(AMDGPU::VGPR0) & AMDGPU::HWEncoding::REG_IDX_MASK;
Encoding.VGPRL = Encoding.VGPR0 + NumVGPRsMax - 1;
Encoding.SGPR0 =
TRI->getEncodingValue(AMDGPU::SGPR0) & AMDGPU::HWEncoding::REG_IDX_MASK;
Encoding.SGPRL = Encoding.SGPR0 + NumSGPRsMax - 1;

BlockInfos.clear();
bool Modified = false;

Expand Down Expand Up @@ -2495,8 +2476,7 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
}

auto NonKernelInitialState = std::make_unique<WaitcntBrackets>(
ST, MaxCounter, Limits, Encoding, WaitEventMaskForInst,
SmemAccessCounter);
ST, MaxCounter, Limits, WaitEventMaskForInst, SmemAccessCounter);
NonKernelInitialState->setStateOnFunctionEntryOrReturn();
BlockInfos[&EntryBB].Incoming = std::move(NonKernelInitialState);

Expand Down Expand Up @@ -2528,10 +2508,9 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
} else {
if (!Brackets)
Brackets = std::make_unique<WaitcntBrackets>(
ST, MaxCounter, Limits, Encoding, WaitEventMaskForInst,
SmemAccessCounter);
ST, MaxCounter, Limits, WaitEventMaskForInst, SmemAccessCounter);
else
*Brackets = WaitcntBrackets(ST, MaxCounter, Limits, Encoding,
*Brackets = WaitcntBrackets(ST, MaxCounter, Limits,
WaitEventMaskForInst, SmemAccessCounter);
}

Expand Down
Loading