[AMDGPU] Implement IR expansion for frem instruction

llvm/include/llvm/CodeGen/ExpandFp.h

@@ -10,6 +10,7 @@
 #define LLVM_CODEGEN_EXPANDFP_H
 
 #include "llvm/IR/PassManager.h"
+#include "llvm/Support/CodeGen.h"
 
 namespace llvm {
 
@@ -18,11 +19,15 @@ class TargetMachine;
 class ExpandFpPass : public PassInfoMixin<ExpandFpPass> {
 private:
   const TargetMachine *TM;
+  CodeGenOptLevel OptLevel;
 
 public:
-  explicit ExpandFpPass(const TargetMachine *TM_) : TM(TM_) {}
+  explicit ExpandFpPass(const TargetMachine *TM, CodeGenOptLevel OptLevel);
 
   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+
+  void printPipeline(raw_ostream &OS,
+                     function_ref<StringRef(StringRef)> MapClassName2PassName);
 };
 
 } // end namespace llvm

llvm/include/llvm/CodeGen/Passes.h

@@ -554,6 +554,9 @@ LLVM_ABI FunctionPass *createCFIFixup();
 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
 LLVM_ABI FunctionPass *createCFIInstrInserter();
 
+// Expands floating point instructions.
+FunctionPass *createExpandFpPass(CodeGenOptLevel);
+
 /// Creates CFGuard longjmp target identification pass.
 /// \see CFGuardLongjmp.cpp
 LLVM_ABI FunctionPass *createCFGuardLongjmpPass();

llvm/include/llvm/Passes/CodeGenPassBuilder.h

@@ -673,7 +673,7 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addISelPasses(
 
   addPass(PreISelIntrinsicLoweringPass(&TM));
   addPass(ExpandLargeDivRemPass(&TM));
-  addPass(ExpandFpPass(&TM));
+  addPass(ExpandFpPass(&TM, getOptLevel()));
 
   derived().addIRPasses(addPass);
   derived().addCodeGenPrepare(addPass);