[NFC][shrinkwrap] Add test point to capture the prologue and epilogue insertion by shrinkwrap pass for powerpc.

[tonykuttai]

This is NFC patch to capture the insertion of prologue and epilogue by shrinkwrap pass for Powerpc target for functions that contain llvm __builtin_frame_address.

[github-actions]

Thank you for submitting a Pull Request (PR) to the LLVM Project!

This PR will be automatically labeled and the relevant teams will be notified.

If you wish to, you can add reviewers by using the "Reviewers" section on this page.

If this is not working for you, it is probably because you do not have write permissions for the repository. In which case you can instead tag reviewers by name in a comment by using @ followed by their GitHub username.

If you have received no comments on your PR for a week, you can request a review by "ping"ing the PR by adding a comment “Ping”. The common courtesy "ping" rate is once a week. Please remember that you are asking for valuable time from other developers.

If you have further questions, they may be answered by the LLVM GitHub User Guide.

You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums.

[llvmbot]

@llvm/pr-subscribers-backend-powerpc

Author: Tony Varghese (tonykuttai)

Changes

This is NFC patch to capture the insertion of prologue and epilogue by shrinkwrap pass for Powerpc target for functions that contain llvm __builtin_frame_address.

---

Full diff: https://github.com/llvm/llvm-project/pull/131192.diff

1 Files Affected:

• (added) llvm/test/CodeGen/PowerPC/shrink-wrap-frame-pointer.ll (+83)

diff --git a/llvm/test/CodeGen/PowerPC/shrink-wrap-frame-pointer.ll b/llvm/test/CodeGen/PowerPC/shrink-wrap-frame-pointer.ll
new file mode 100644
index 0000000000000..94bd827e3e75c
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/shrink-wrap-frame-pointer.ll
@@ -0,0 +1,83 @@
+; Test file to verify the prologue and epilogue insertion point computation by the shrink-wrap pass
+
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s --check-prefixes=POWERPC64
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 | FileCheck %s --check-prefixes=POWERPC32-AIX
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 | FileCheck %s --check-prefixes=POWERPC64-AIX
+
+define void @foo(ptr noundef readnone %parent_frame_pointer) {
+; POWERPC64-LABEL:      foo
+; POWERPC64:            # %bb.0:
+; POWERPC64-NEXT:           cmpld [[REG1:[0-9]+]], 1
+; POWERPC64:            # %bb.1:
+; POWERPC64-NEXT:           mflr 0
+; POWERPC64-NEXT:           stdu 1, -32(1)
+
+; POWERPC32-AIX-LABEL:  .foo:
+; POWERPC32-AIX:        # %bb.0:
+; POWERPC32-AIX-NEXT:       cmplw [[REG1:[0-9]+]], 1
+; POWERPC32-AIX:        # %bb.1:
+; POWERPC32-AIX-NEXT:       mflr 0
+; POWERPC32-AIX-NEXT:       stwu 1, -64(1)
+
+; POWERPC64-AIX-LABEL:  .foo:
+; POWERPC64-AIX:        # %bb.0:
+; POWERPC64-AIX-NEXT:       cmpld [[REG1:[0-9]+]], 1
+; POWERPC64-AIX:        # %bb.1:
+; POWERPC64-AIX-NEXT:       mflr 0
+; POWERPC64-AIX-NEXT:       stdu 1, -112(1)
+
+entry:
+  %frameaddress = tail call ptr @llvm.frameaddress.p0(i32 0)
+  %cmp = icmp ugt ptr %parent_frame_pointer, %frameaddress
+  br i1 %cmp, label %cond.end, label %cond.false
+
+cond.false:                                       ; preds = %entry
+  tail call void @abort()
+  unreachable
+
+cond.end:                                         ; preds = %entry
+  ret void
+}
+
+declare ptr @llvm.frameaddress.p0(i32 immarg)
+declare void @abort()
+
+define noundef i32 @main() {
+; POWERPC64-LABEL:      main
+; POWERPC64:            # %bb.0:
+; POWERPC64-NEXT:           mflr [[LR:[0-9]+]]
+; POWERPC64-NEXT:           stdu 1, -32(1)
+; POWERPC64-NEXT:           std [[LR]], 48(1)
+; POWERPC64:                mr [[REG2:[0-9]+]], 1
+; POWERPC64:                addi 1, 1, 32
+; POWERPC64-NEXT:           ld [[LR]], 16(1)
+; POWERPC64-NEXT:           mtlr [[LR]]
+; POWERPC64-NEXT:           blr
+
+; POWERPC32-AIX-LABEL:  .main:
+; POWERPC32-AIX:        # %bb.0:
+; POWERPC32-AIX-NEXT:       mflr [[LR:[0-9]+]]
+; POWERPC32-AIX-NEXT:       stwu 1, -64(1)
+; POWERPC32-AIX-NEXT:       mr [[REG2:[0-9]+]], 1
+; POWERPC32-AIX-NEXT:       stw [[LR]], 72(1)
+; POWERPC32-AIX:            addi 1, 1, 64
+; POWERPC32-AIX-NEXT:       lwz [[LR]], 8(1)
+; POWERPC32-AIX-NEXT:       mtlr [[LR]]
+; POWERPC32-AIX-NEXT:       blr
+
+; POWERPC64-AIX-LABEL: .main:
+; POWERPC64-AIX:       # %bb.0:
+; POWERPC64-AIX-NEXT:       mflr [[LR:[0-9]+]]
+; POWERPC64-AIX-NEXT:       stdu 1, -112(1)
+; POWERPC64-AIX-NEXT:       mr [[REG2:[0-9]+]], 1
+; POWERPC64-AIX-NEXT:       std [[LR]], 128(1)
+; POWERPC64-AIX:            addi 1, 1, 112
+; POWERPC64-AIX-NEXT:       ld [[LR]], 16(1)
+; POWERPC64-AIX-NEXT:       mtlr [[LR]]
+; POWERPC64-AIX-NEXT:       blr
+
+entry:
+  %frameaddress = tail call ptr @llvm.frameaddress.p0(i32 0)
+  tail call void @foo(ptr noundef %frameaddress)
+  ret i32 0
+}

[tonykuttai]

@w2yehia @redstar @lei137

This PR is raised following this comment: #129855 (comment)

[lei137]

LGTM

[github-actions]

@tonykuttai Congratulations on having your first Pull Request (PR) merged into the LLVM Project!

Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR.

Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues.

How to do this, and the rest of the post-merge process, is covered in detail here.

If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again.

If you don't get any reports, no action is required from you. Your changes are working as expected, well done!