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[NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() #131379

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Merged
merged 2 commits into from
Mar 14, 2025
Merged

[NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() #131379

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[NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN()
shiltian Mar 14, 2025
59dec75
git-clang-format
shiltian Mar 14, 2025
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2 changes: 1 addition & 1 deletion clang/include/clang/Driver/ToolChain.h
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Original file line number Diff line number Diff line change
Expand Up @@ -821,7 +821,7 @@ class ToolChain {
return llvm::Triple("nvptx-nvidia-cuda");
if (TT.getArch() == llvm::Triple::nvptx64)
return llvm::Triple("nvptx64-nvidia-cuda");
if (TT.getArch() == llvm::Triple::amdgcn)
if (TT.isAMDGCN())
return llvm::Triple("amdgcn-amd-amdhsa");
}
return TT;
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20 changes: 8 additions & 12 deletions clang/lib/Basic/Targets/AMDGPU.h
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Expand Up @@ -52,7 +52,7 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
std::string TargetID;

bool hasFP64() const {
return getTriple().getArch() == llvm::Triple::amdgcn ||
return getTriple().isAMDGCN() ||
!!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64);
}

Expand All @@ -62,12 +62,10 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
}

/// Has fast fma f64
bool hasFastFMA() const {
return getTriple().getArch() == llvm::Triple::amdgcn;
}
bool hasFastFMA() const { return getTriple().isAMDGCN(); }

bool hasFMAF() const {
return getTriple().getArch() == llvm::Triple::amdgcn ||
return getTriple().isAMDGCN() ||
!!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA);
}

Expand All @@ -76,13 +74,11 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
}

bool hasLDEXPF() const {
return getTriple().getArch() == llvm::Triple::amdgcn ||
return getTriple().isAMDGCN() ||
!!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP);
}

static bool isAMDGCN(const llvm::Triple &TT) {
return TT.getArch() == llvm::Triple::amdgcn;
}
static bool isAMDGCN(const llvm::Triple &TT) { return TT.isAMDGCN(); }

static bool isR600(const llvm::Triple &TT) {
return TT.getArch() == llvm::Triple::r600;
Expand Down Expand Up @@ -125,7 +121,7 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
}

uint64_t getMaxPointerWidth() const override {
return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
return getTriple().isAMDGCN() ? 64 : 32;
}

bool hasBFloat16Type() const override { return isAMDGCN(getTriple()); }
Expand Down Expand Up @@ -269,15 +265,15 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
}

bool isValidCPUName(StringRef Name) const override {
if (getTriple().getArch() == llvm::Triple::amdgcn)
if (getTriple().isAMDGCN())
return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
}

void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;

bool setCPU(const std::string &Name) override {
if (getTriple().getArch() == llvm::Triple::amdgcn) {
if (getTriple().isAMDGCN()) {
GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
} else {
Expand Down
6 changes: 2 additions & 4 deletions clang/lib/Driver/Driver.cpp
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Expand Up @@ -158,8 +158,7 @@ getHIPOffloadTargetTriple(const Driver &D, const ArgList &Args) {
auto TT = getOffloadTargetTriple(D, Args);
if (!TT)
return std::nullopt;
if (TT->getArch() == llvm::Triple::amdgcn &&
TT->getVendor() == llvm::Triple::AMD &&
if (TT->isAMDGCN() && TT->getVendor() == llvm::Triple::AMD &&
TT->getOS() == llvm::Triple::AMDHSA)
return TT;
if (TT->getArch() == llvm::Triple::spirv64)
Expand Down Expand Up @@ -3409,8 +3408,7 @@ class OffloadingActionBuilder final {

const ToolChain *HostTC = C.getSingleOffloadToolChain<Action::OFK_Host>();
assert(HostTC && "No toolchain for host compilation.");
if (HostTC->getTriple().isNVPTX() ||
HostTC->getTriple().getArch() == llvm::Triple::amdgcn) {
if (HostTC->getTriple().isNVPTX() || HostTC->getTriple().isAMDGCN()) {
// We do not support targeting NVPTX/AMDGCN for host compilation. Throw
// an error and abort pipeline construction early so we don't trip
// asserts that assume device-side compilation.
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Driver/ToolChains/HIPAMD.cpp
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Expand Up @@ -296,7 +296,7 @@ HIPAMDToolChain::TranslateArgs(const llvm::opt::DerivedArgList &Args,
}

Tool *HIPAMDToolChain::buildLinker() const {
assert(getTriple().getArch() == llvm::Triple::amdgcn ||
assert(getTriple().isAMDGCN() ||
getTriple().getArch() == llvm::Triple::spirv64);
return new tools::AMDGCN::Linker(*this);
}
Expand Down
3 changes: 1 addition & 2 deletions clang/lib/Frontend/CompilerInvocation.cpp
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Expand Up @@ -4322,8 +4322,7 @@ bool CompilerInvocation::ParseLangArgs(LangOptions &Opts, ArgList &Args,
TT.getArch() == llvm::Triple::systemz ||
TT.getArch() == llvm::Triple::loongarch64 ||
TT.getArch() == llvm::Triple::nvptx ||
TT.getArch() == llvm::Triple::nvptx64 ||
TT.getArch() == llvm::Triple::amdgcn ||
TT.getArch() == llvm::Triple::nvptx64 || TT.isAMDGCN() ||
TT.getArch() == llvm::Triple::x86 ||
TT.getArch() == llvm::Triple::x86_64))
Diags.Report(diag::err_drv_invalid_omp_target) << A->getValue(i);
Expand Down
3 changes: 1 addition & 2 deletions flang/lib/Frontend/CompilerInvocation.cpp
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Expand Up @@ -1174,8 +1174,7 @@ static bool parseOpenMPArgs(CompilerInvocation &res, llvm::opt::ArgList &args,
!(tt.getArch() == llvm::Triple::aarch64 || tt.isPPC() ||
tt.getArch() == llvm::Triple::systemz ||
tt.getArch() == llvm::Triple::nvptx ||
tt.getArch() == llvm::Triple::nvptx64 ||
tt.getArch() == llvm::Triple::amdgcn ||
tt.getArch() == llvm::Triple::nvptx64 || tt.isAMDGCN() ||
tt.getArch() == llvm::Triple::x86 ||
tt.getArch() == llvm::Triple::x86_64))
diags.Report(clang::diag::err_drv_invalid_omp_target)
Expand Down
4 changes: 1 addition & 3 deletions llvm/include/llvm/TargetParser/Triple.h
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Expand Up @@ -888,9 +888,7 @@ class Triple {
/// Tests whether the target is AMDGCN
bool isAMDGCN() const { return getArch() == Triple::amdgcn; }

bool isAMDGPU() const {
return getArch() == Triple::r600 || getArch() == Triple::amdgcn;
}
bool isAMDGPU() const { return getArch() == Triple::r600 || isAMDGCN(); }

/// Tests whether the target is Thumb (little and big endian).
bool isThumb() const {
Expand Down
3 changes: 1 addition & 2 deletions llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
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Expand Up @@ -454,8 +454,7 @@ void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) {
// 1 = Vector Register Class
SmallVector<SDValue, 32 * 2 + 1> RegSeqArgs(NumVectorElts * 2 + 1);

bool IsGCN = CurDAG->getSubtarget().getTargetTriple().getArch() ==
Triple::amdgcn;
bool IsGCN = CurDAG->getSubtarget().getTargetTriple().isAMDGCN();
RegSeqArgs[0] = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32);
bool IsRegSeq = true;
unsigned NOps = N->getNumOperands();
Expand Down
6 changes: 3 additions & 3 deletions llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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Expand Up @@ -5463,7 +5463,7 @@ bool AMDGPUAsmParser::ParseAsAbsoluteExpression(uint32_t &Ret) {
}

bool AMDGPUAsmParser::ParseDirectiveAMDGCNTarget() {
if (getSTI().getTargetTriple().getArch() != Triple::amdgcn)
if (!getSTI().getTargetTriple().isAMDGCN())
return TokError("directive only supported for amdgcn architecture");

std::string TargetIDDirective;
Expand Down Expand Up @@ -5550,7 +5550,7 @@ bool AMDGPUAsmParser::calculateGPRBlocks(
}

bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {
if (getSTI().getTargetTriple().getArch() != Triple::amdgcn)
if (!getSTI().getTargetTriple().isAMDGCN())
return TokError("directive only supported for amdgcn architecture");

if (!isHsaAbi(getSTI()))
Expand Down Expand Up @@ -6142,7 +6142,7 @@ bool AMDGPUAsmParser::ParseDirectiveAMDGPUHsaKernel() {
}

bool AMDGPUAsmParser::ParseDirectiveISAVersion() {
if (getSTI().getTargetTriple().getArch() != Triple::amdgcn) {
if (!getSTI().getTargetTriple().isAMDGCN()) {
return Error(getLoc(),
".amd_amdgpu_isa directive is not available on non-amdgcn "
"architectures");
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
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Expand Up @@ -1004,7 +1004,7 @@ unsigned getEUsPerCU(const MCSubtargetInfo *STI) {
unsigned getMaxWorkGroupsPerCU(const MCSubtargetInfo *STI,
unsigned FlatWorkGroupSize) {
assert(FlatWorkGroupSize != 0);
if (STI->getTargetTriple().getArch() != Triple::amdgcn)
if (!STI->getTargetTriple().isAMDGCN())
return 8;
unsigned MaxWaves = getMaxWavesPerEU(STI) * getEUsPerCU(STI);
unsigned N = getWavesPerWorkGroup(STI, FlatWorkGroupSize);
Expand Down
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