[AMDGPU] Avoid repeated hash lookups (NFC)

[kazutakahirata]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Kazu Hirata (kazutakahirata)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/131493.diff

1 Files Affected:

• (modified) llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp (+3-3)

diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
index 296031e4a068f..cdd6cb8fdd6fc 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
@@ -226,9 +226,9 @@ void AMDGPUPALMetadata::setRegister(unsigned Reg, const MCExpr *Val,
       return;
   }
   auto &N = getRegisters()[MsgPackDoc.getNode(Reg)];
-  auto ExprIt = REM.find(Reg);
+  auto [ExprIt, Inserted] = REM.try_emplace(Reg);
 
-  if (ExprIt != REM.end()) {
+  if (!Inserted) {
     Val = MCBinaryExpr::createOr(Val, ExprIt->getSecond(), Ctx);
     // This conditional may be redundant most of the time, but the alternate
     // setRegister(unsigned, unsigned) could've been called while the
@@ -245,7 +245,7 @@ void AMDGPUPALMetadata::setRegister(unsigned Reg, const MCExpr *Val,
     // propagate ORs.
     N = (uint64_t)0;
   }
-  REM[Reg] = Val;
+  ExprIt->second = Val;
   DelayedExprs.assignDocNode(N, msgpack::Type::UInt, Val);
 }