[CostModel][X86] merge vector shifts costs tests using -cost-kind=all

[RKSimon]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-x86

@llvm/pr-subscribers-llvm-analysis

Author: Simon Pilgrim (RKSimon)

Changes

---

Patch is 2.73 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/131806.diff

15 Files Affected:

• (removed) llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll (-1758)
• (modified) llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll (+1037-917)
• (modified) llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll (+1037-917)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll (-1896)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll (-1790)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll (-1718)
• (modified) llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll (+1048-884)
• (modified) llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll (+1048-884)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll (-1860)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll (-1734)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll (-1692)
• (modified) llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll (+1333-1097)
• (modified) llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll (+1333-1097)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll (-1820)
• (removed) llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll (-1782)

diff --git a/llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll b/llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
deleted file mode 100644
index 195c61921219f..0000000000000
--- a/llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
+++ /dev/null
@@ -1,1758 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+xop,+avx | FileCheck %s --check-prefixes=CHECK,XOP,XOPAVX1
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=CHECK,XOP,XOPAVX2
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW
-;
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE42
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE42
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mcpu=tigerlake | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512GFNI
-
-; Verify the cost of vector logical shift right instructions.
-
-;
-; Variable Shifts
-;
-
-define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) {
-; SSE2-LABEL: 'var_shift_v2i64'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %shift = ashr <2 x i64> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %shift
-;
-; SSE42-LABEL: 'var_shift_v2i64'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <2 x i64> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %shift
-;
-; AVX1-LABEL: 'var_shift_v2i64'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <2 x i64> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %shift
-;
-; AVX2-LABEL: 'var_shift_v2i64'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <2 x i64> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %shift
-;
-; XOP-LABEL: 'var_shift_v2i64'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <2 x i64> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %shift
-;
-; AVX512-LABEL: 'var_shift_v2i64'
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <2 x i64> %a, %b
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <2 x i64> %shift
-;
-  %shift = ashr <2 x i64> %a, %b
-  ret <2 x i64> %shift
-}
-
-define <4 x i64> @var_shift_v4i64(<4 x i64> %a, <4 x i64> %b) {
-; SSE2-LABEL: 'var_shift_v4i64'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %shift = ashr <4 x i64> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i64> %shift
-;
-; SSE42-LABEL: 'var_shift_v4i64'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <4 x i64> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i64> %shift
-;
-; AVX1-LABEL: 'var_shift_v4i64'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %shift = ashr <4 x i64> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i64> %shift
-;
-; AVX2-LABEL: 'var_shift_v4i64'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <4 x i64> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i64> %shift
-;
-; XOP-LABEL: 'var_shift_v4i64'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <4 x i64> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i64> %shift
-;
-; AVX512-LABEL: 'var_shift_v4i64'
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i64> %a, %b
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i64> %shift
-;
-  %shift = ashr <4 x i64> %a, %b
-  ret <4 x i64> %shift
-}
-
-define <8 x i64> @var_shift_v8i64(<8 x i64> %a, <8 x i64> %b) {
-; SSE2-LABEL: 'var_shift_v8i64'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %shift = ashr <8 x i64> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %shift
-;
-; SSE42-LABEL: 'var_shift_v8i64'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %shift = ashr <8 x i64> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %shift
-;
-; AVX1-LABEL: 'var_shift_v8i64'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %shift = ashr <8 x i64> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %shift
-;
-; AVX2-LABEL: 'var_shift_v8i64'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <8 x i64> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %shift
-;
-; XOP-LABEL: 'var_shift_v8i64'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <8 x i64> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %shift
-;
-; AVX512-LABEL: 'var_shift_v8i64'
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i64> %a, %b
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i64> %shift
-;
-  %shift = ashr <8 x i64> %a, %b
-  ret <8 x i64> %shift
-}
-
-define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
-; SSE2-LABEL: 'var_shift_v4i32'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %shift = ashr <4 x i32> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %shift
-;
-; SSE42-LABEL: 'var_shift_v4i32'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %shift = ashr <4 x i32> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %shift
-;
-; AVX1-LABEL: 'var_shift_v4i32'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %shift = ashr <4 x i32> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %shift
-;
-; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %shift
-;
-; XOP-LABEL: 'var_shift_v4i32'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %shift
-;
-; AVX512-LABEL: 'var_shift_v4i32'
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <4 x i32> %shift
-;
-  %shift = ashr <4 x i32> %a, %b
-  ret <4 x i32> %shift
-}
-
-define <8 x i32> @var_shift_v8i32(<8 x i32> %a, <8 x i32> %b) {
-; SSE2-LABEL: 'var_shift_v8i32'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %shift = ashr <8 x i32> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-; SSE42-LABEL: 'var_shift_v8i32'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %shift = ashr <8 x i32> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-; AVX1-LABEL: 'var_shift_v8i32'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %shift = ashr <8 x i32> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-; AVX2-LABEL: 'var_shift_v8i32'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i32> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-; XOPAVX1-LABEL: 'var_shift_v8i32'
-; XOPAVX1-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <8 x i32> %a, %b
-; XOPAVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v8i32'
-; XOPAVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i32> %a, %b
-; XOPAVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-; AVX512-LABEL: 'var_shift_v8i32'
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i32> %a, %b
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i32> %shift
-;
-  %shift = ashr <8 x i32> %a, %b
-  ret <8 x i32> %shift
-}
-
-define <16 x i32> @var_shift_v16i32(<16 x i32> %a, <16 x i32> %b) {
-; SSE2-LABEL: 'var_shift_v16i32'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %shift = ashr <16 x i32> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-; SSE42-LABEL: 'var_shift_v16i32'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %shift = ashr <16 x i32> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-; AVX1-LABEL: 'var_shift_v16i32'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %shift = ashr <16 x i32> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-; AVX2-LABEL: 'var_shift_v16i32'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <16 x i32> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-; XOPAVX1-LABEL: 'var_shift_v16i32'
-; XOPAVX1-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <16 x i32> %a, %b
-; XOPAVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v16i32'
-; XOPAVX2-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <16 x i32> %a, %b
-; XOPAVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-; AVX512-LABEL: 'var_shift_v16i32'
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <16 x i32> %a, %b
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i32> %shift
-;
-  %shift = ashr <16 x i32> %a, %b
-  ret <16 x i32> %shift
-}
-
-define <8 x i16> @var_shift_v8i16(<8 x i16> %a, <8 x i16> %b) {
-; SSE2-LABEL: 'var_shift_v8i16'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %shift = ashr <8 x i16> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; SSE42-LABEL: 'var_shift_v8i16'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %shift = ashr <8 x i16> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; AVX1-LABEL: 'var_shift_v8i16'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %shift = ashr <8 x i16> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; AVX2-LABEL: 'var_shift_v8i16'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <8 x i16> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; XOP-LABEL: 'var_shift_v8i16'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i16> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; AVX512F-LABEL: 'var_shift_v8i16'
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <8 x i16> %a, %b
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; AVX512BW-LABEL: 'var_shift_v8i16'
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i16> %a, %b
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-; AVX512GFNI-LABEL: 'var_shift_v8i16'
-; AVX512GFNI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <8 x i16> %a, %b
-; AVX512GFNI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <8 x i16> %shift
-;
-  %shift = ashr <8 x i16> %a, %b
-  ret <8 x i16> %shift
-}
-
-define <16 x i16> @var_shift_v16i16(<16 x i16> %a, <16 x i16> %b) {
-; SSE2-LABEL: 'var_shift_v16i16'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 62 for instruction: %shift = ashr <16 x i16> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; SSE42-LABEL: 'var_shift_v16i16'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %shift = ashr <16 x i16> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; AVX1-LABEL: 'var_shift_v16i16'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %shift = ashr <16 x i16> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; AVX2-LABEL: 'var_shift_v16i16'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <16 x i16> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; XOP-LABEL: 'var_shift_v16i16'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %shift = ashr <16 x i16> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; AVX512F-LABEL: 'var_shift_v16i16'
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <16 x i16> %a, %b
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; AVX512BW-LABEL: 'var_shift_v16i16'
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <16 x i16> %a, %b
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-; AVX512GFNI-LABEL: 'var_shift_v16i16'
-; AVX512GFNI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <16 x i16> %a, %b
-; AVX512GFNI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i16> %shift
-;
-  %shift = ashr <16 x i16> %a, %b
-  ret <16 x i16> %shift
-}
-
-define <32 x i16> @var_shift_v32i16(<32 x i16> %a, <32 x i16> %b) {
-; SSE2-LABEL: 'var_shift_v32i16'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 124 for instruction: %shift = ashr <32 x i16> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; SSE42-LABEL: 'var_shift_v32i16'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 92 for instruction: %shift = ashr <32 x i16> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; AVX1-LABEL: 'var_shift_v32i16'
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 62 for instruction: %shift = ashr <32 x i16> %a, %b
-; AVX1-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; AVX2-LABEL: 'var_shift_v32i16'
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %shift = ashr <32 x i16> %a, %b
-; AVX2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; XOP-LABEL: 'var_shift_v32i16'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %shift = ashr <32 x i16> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; AVX512F-LABEL: 'var_shift_v32i16'
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %shift = ashr <32 x i16> %a, %b
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; AVX512BW-LABEL: 'var_shift_v32i16'
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <32 x i16> %a, %b
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-; AVX512GFNI-LABEL: 'var_shift_v32i16'
-; AVX512GFNI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <32 x i16> %a, %b
-; AVX512GFNI-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <32 x i16> %shift
-;
-  %shift = ashr <32 x i16> %a, %b
-  ret <32 x i16> %shift
-}
-
-define <16 x i8> @var_shift_v16i8(<16 x i8> %a, <16 x i8> %b) {
-; SSE2-LABEL: 'var_shift_v16i8'
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 54 for instruction: %shift = ashr <16 x i8> %a, %b
-; SSE2-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i8> %shift
-;
-; SSE42-LABEL: 'var_shift_v16i8'
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %shift = ashr <16 x i8> %a, %b
-; SSE42-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i8> %shift
-;
-; AVX-LABEL: 'var_shift_v16i8'
-; AVX-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %shift = ashr <16 x i8> %a, %b
-; AVX-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i8> %shift
-;
-; XOP-LABEL: 'var_shift_v16i8'
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <16 x i8> %a, %b
-; XOP-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret <16 x i8> %shift
-;
-...
[truncated]

[github-actions]

⚠️ undef deprecator found issues in your code. ⚠️

You can test this locally with the following command:

git diff -U0 --pickaxe-regex -S '([^a-zA-Z0-9#_-]undef[^a-zA-Z0-9_-]|UndefValue::get)' d85a81b4e4cfc0fdc7c259d64f847e7bbeee56d2 82383d7b684faa85112c555ba6fd4a601b96dd39 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll

The following files introduce new uses of undef:

• llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
• llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
• llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
• llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll

Undef is now deprecated and should only be used in the rare cases where no replacement is possible. For example, a load of uninitialized memory yields undef. You should use poison values for placeholders instead.

In tests, avoid using undef and having tests that trigger undefined behavior. If you need an operand with some unimportant value, you can add a new argument to the function and use that instead.

For example, this is considered a bad practice:

define void @fn() {
  ...
  br i1 undef, ...
}

Please use the following instead:

define void @fn(i1 %cond) {
  ...
  br i1 %cond, ...
}

Please refer to the Undefined Behavior Manual for more information.

[llvm-ci]

LLVM Buildbot has detected a new failure on builder openmp-offload-amdgpu-runtime running on omp-vega20-0 while building llvm at step 7 "Add check check-offload".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/30/builds/17874

Here is the relevant piece of the build log for the reference

Step 7 (Add check check-offload) failure: test (failure)
...
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/bug49779.cpp (1026 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/bug50022.cpp (1027 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/bug53727.cpp (1028 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/wtime.c (1029 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu :: offloading/bug49021.cpp (1030 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu :: offloading/std_complex_arithmetic.cpp (1031 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/complex_reduction.cpp (1032 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/std_complex_arithmetic.cpp (1033 of 1035)
PASS: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/bug49021.cpp (1034 of 1035)
TIMEOUT: libomptarget :: amdgcn-amd-amdhsa :: offloading/ctor_dtor.cpp (1035 of 1035)
******************** TEST 'libomptarget :: amdgcn-amd-amdhsa :: offloading/ctor_dtor.cpp' FAILED ********************
Exit Code: -9
Timeout: Reached timeout of 100 seconds

Command Output (stdout):
--
# RUN: at line 1
/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./bin/clang++ -fopenmp    -I /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.src/offload/test -I /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/openmp/runtime/src -L /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload -L /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./lib -L /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/openmp/runtime/src  -nogpulib -Wl,-rpath,/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload -Wl,-rpath,/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/openmp/runtime/src -Wl,-rpath,/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./lib  -fopenmp-targets=amdgcn-amd-amdhsa /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.src/offload/test/offloading/ctor_dtor.cpp -o /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload/test/amdgcn-amd-amdhsa/offloading/Output/ctor_dtor.cpp.tmp /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./lib/libomptarget.devicertl.a && /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload/test/amdgcn-amd-amdhsa/offloading/Output/ctor_dtor.cpp.tmp | /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./bin/FileCheck /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.src/offload/test/offloading/ctor_dtor.cpp
# executed command: /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./bin/clang++ -fopenmp -I /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.src/offload/test -I /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/openmp/runtime/src -L /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload -L /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./lib -L /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/openmp/runtime/src -nogpulib -Wl,-rpath,/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload -Wl,-rpath,/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/openmp/runtime/src -Wl,-rpath,/home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./lib -fopenmp-targets=amdgcn-amd-amdhsa /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.src/offload/test/offloading/ctor_dtor.cpp -o /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload/test/amdgcn-amd-amdhsa/offloading/Output/ctor_dtor.cpp.tmp /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./lib/libomptarget.devicertl.a
# note: command had no output on stdout or stderr
# executed command: /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/runtimes/runtimes-bins/offload/test/amdgcn-amd-amdhsa/offloading/Output/ctor_dtor.cpp.tmp
# note: command had no output on stdout or stderr
# error: command failed with exit status: -9
# error: command reached timeout: True
# executed command: /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.build/./bin/FileCheck /home/ompworker/bbot/openmp-offload-amdgpu-runtime/llvm.src/offload/test/offloading/ctor_dtor.cpp
# note: command had no output on stdout or stderr
# error: command failed with exit status: -9
# error: command reached timeout: True

--

********************
Slowest Tests:
--------------------------------------------------------------------------
100.05s: libomptarget :: amdgcn-amd-amdhsa :: offloading/ctor_dtor.cpp
15.33s: libomptarget :: amdgcn-amd-amdhsa :: offloading/bug49021.cpp
12.42s: libomptarget :: amdgcn-amd-amdhsa :: offloading/parallel_target_teams_reduction_max.cpp
12.23s: libomptarget :: amdgcn-amd-amdhsa :: offloading/parallel_target_teams_reduction_min.cpp
10.55s: libomptarget :: amdgcn-amd-amdhsa :: offloading/complex_reduction.cpp
9.30s: libomptarget :: amdgcn-amd-amdhsa :: jit/empty_kernel_lvl2.c
8.55s: libomptarget :: x86_64-unknown-linux-gnu :: offloading/bug49021.cpp
7.37s: libomptarget :: amdgcn-amd-amdhsa :: offloading/barrier_fence.c
7.25s: libomptarget :: amdgcn-amd-amdhsa :: offloading/ompx_saxpy_mixed.c
7.21s: libomptarget :: x86_64-unknown-linux-gnu :: offloading/std_complex_arithmetic.cpp
6.93s: libomptarget :: x86_64-unknown-linux-gnu :: offloading/complex_reduction.cpp
6.62s: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/bug49021.cpp
6.04s: libomptarget :: amdgcn-amd-amdhsa :: offloading/parallel_target_teams_reduction.cpp
5.47s: libomptarget :: amdgcn-amd-amdhsa :: offloading/default_thread_limit.c
4.93s: libomptarget :: x86_64-unknown-linux-gnu-LTO :: offloading/std_complex_arithmetic.cpp

[llvm-ci]

LLVM Buildbot has detected a new failure on builder llvm-clang-aarch64-darwin running on doug-worker-5 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/190/builds/16611

Here is the relevant piece of the build log for the reference

Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll' FAILED ********************
Exit Code: 2

Command Output (stderr):
--
RUN: at line 1: /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli -jit-kind=orc-lazy -compile-threads=2 -thread-entry hello /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/llvm/test/ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll | /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/FileCheck /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/llvm/test/ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll
+ /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/FileCheck /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/llvm/test/ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll
+ /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli -jit-kind=orc-lazy -compile-threads=2 -thread-entry hello /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/llvm/test/ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
 #0 0x00000001050d0444 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli+0x100ec0444)
 #1 0x00000001050ce4c8 llvm::sys::RunSignalHandlers() (/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli+0x100ebe4c8)
 #2 0x00000001050d0b00 SignalHandler(int, __siginfo*, void*) (/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli+0x100ec0b00)
 #3 0x0000000192ce2584 (/usr/lib/system/libsystem_platform.dylib+0x18047a584)
 #4 0x0000000192cb121c (/usr/lib/system/libsystem_pthread.dylib+0x18044921c)
 #5 0x0000000192bd7ad0 (/usr/lib/libc++.1.dylib+0x18036fad0)
 #6 0x0000000104c79d4c void llvm::detail::UniqueFunctionBase<void, llvm::Expected<llvm::DenseMap<llvm::orc::SymbolStringPtr, llvm::orc::ExecutorSymbolDef, llvm::DenseMapInfo<llvm::orc::SymbolStringPtr, void>, llvm::detail::DenseMapPair<llvm::orc::SymbolStringPtr, llvm::orc::ExecutorSymbolDef>>>>::CallImpl<llvm::orc::Platform::lookupInitSymbols(llvm::orc::ExecutionSession&, llvm::DenseMap<llvm::orc::JITDylib*, llvm::orc::SymbolLookupSet, llvm::DenseMapInfo<llvm::orc::JITDylib*, void>, llvm::detail::DenseMapPair<llvm::orc::JITDylib*, llvm::orc::SymbolLookupSet>> const&)::$_45>(void*, llvm::Expected<llvm::DenseMap<llvm::orc::SymbolStringPtr, llvm::orc::ExecutorSymbolDef, llvm::DenseMapInfo<llvm::orc::SymbolStringPtr, void>, llvm::detail::DenseMapPair<llvm::orc::SymbolStringPtr, llvm::orc::ExecutorSymbolDef>>>&) (/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli+0x100a69d4c)
 #7 0x0000000104c75b3c llvm::orc::AsynchronousSymbolQuery::handleComplete(llvm::orc::ExecutionSession&)::RunQueryCompleteTask::run() (/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli+0x100a65b3c)
 #8 0x0000000104d30bd0 void* std::__1::__thread_proxy[abi:un170006]<std::__1::tuple<std::__1::unique_ptr<std::__1::__thread_struct, std::__1::default_delete<std::__1::__thread_struct>>, llvm::orc::DynamicThreadPoolTaskDispatcher::dispatch(std::__1::unique_ptr<llvm::orc::Task, std::__1::default_delete<llvm::orc::Task>>)::$_0>>(void*) (/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/lli+0x100b20bd0)
 #9 0x0000000192cb1f94 (/usr/lib/system/libsystem_pthread.dylib+0x180449f94)
#10 0x0000000192cacd34 (/usr/lib/system/libsystem_pthread.dylib+0x180444d34)
FileCheck error: '<stdin>' is empty.
FileCheck command line:  /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/FileCheck /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/llvm/test/ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll

--

********************