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Remove iOS 5 check for tailcalls on ARM #133354

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Merged
merged 3 commits into from
Apr 4, 2025
Merged

Remove iOS 5 check for tailcalls on ARM #133354

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a5c1898
Remove iOS 5 check for tailcalls on ARM
Un1q32 Mar 28, 2025
8431e86
fix tests
Un1q32 Mar 29, 2025
e5384c1
revert change to target triple
Un1q32 Mar 30, 2025
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3 changes: 0 additions & 3 deletions llvm/lib/Target/ARM/ARMSubtarget.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -226,9 +226,6 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {

SupportsTailCall = !isThumb1Only() || hasV8MBaselineOps();

if (isTargetMachO() && isTargetIOS() && getTargetTriple().isOSVersionLT(5, 0))
SupportsTailCall = false;

switch (IT) {
case DefaultIT:
RestrictIT = false;
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll
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Expand Up @@ -9,8 +9,8 @@ entry:
; CHECK: mov r7, sp
; CHECK: bl _foo
; CHECK: bl _foo
; CHECK: bl _foo
; CHECK: pop {r7, pc}
; CHECK: pop
; CHECK: b

%0 = tail call ptr @foo(ptr %x) nounwind
%1 = tail call ptr @foo(ptr %0) nounwind
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8 changes: 4 additions & 4 deletions llvm/test/CodeGen/ARM/ldm.ll
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Expand Up @@ -5,9 +5,9 @@

define i32 @t1() {
; CHECK-LABEL: t1:
; CHECK: pop
; CHECK: ldrd
; V4T-LABEL: t1:
; V4T: pop
; V4T: ldm
%tmp = load i32, ptr @X ; <i32> [#uses=1]
%tmp3 = load i32, ptr getelementptr ([0 x i32], ptr @X, i32 0, i32 1) ; <i32> [#uses=1]
%tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
Expand All @@ -16,9 +16,9 @@ define i32 @t1() {

define i32 @t2() {
; CHECK-LABEL: t2:
; CHECK: pop
; CHECK: ldm
; V4T-LABEL: t2:
; V4T: pop
; V4T: ldm
%tmp = load i32, ptr getelementptr ([0 x i32], ptr @X, i32 0, i32 2) ; <i32> [#uses=1]
%tmp3 = load i32, ptr getelementptr ([0 x i32], ptr @X, i32 0, i32 3) ; <i32> [#uses=1]
%tmp5 = load i32, ptr getelementptr ([0 x i32], ptr @X, i32 0, i32 4) ; <i32> [#uses=1]
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3 changes: 1 addition & 2 deletions llvm/test/CodeGen/ARM/zextload_demandedbits.ll
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Expand Up @@ -10,8 +10,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-
; CHECK: quux
; CHECK: lsl
; CHECK: asr
; CHECK: bl
; CHECK: pop
; CHECK: b
define void @quux(ptr %arg) {
bb:
%tmp1 = getelementptr inbounds %struct.eggs, ptr %arg, i32 0, i32 1
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