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[RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. #133789

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Apr 1, 2025
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29 changes: 21 additions & 8 deletions llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -484,9 +484,13 @@ static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);
static DecodeStatus decodeRVCInstrRdSImm6(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus decodeRVCInstrRdCLUIImm(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder);

static DecodeStatus
decodeRVCInstrRdRs1UImmLog2XLenNonZero(MCInst &Inst, uint32_t Insn,
Expand Down Expand Up @@ -544,18 +548,27 @@ static DecodeStatus decodeCSSPushPopchk(MCInst &Inst, uint32_t Insn,
return MCDisassembler::Success;
}

static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
static DecodeStatus decodeRVCInstrRdSImm6(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
Inst.addOperand(MCOperand::createReg(RISCV::X0));
uint32_t SImm6 =
uint32_t Imm =
fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
[[maybe_unused]] DecodeStatus Result =
decodeSImmOperand<6>(Inst, SImm6, Address, Decoder);
decodeSImmOperand<6>(Inst, Imm, Address, Decoder);
assert(Result == MCDisassembler::Success && "Invalid immediate");
return MCDisassembler::Success;
}

static DecodeStatus decodeRVCInstrRdCLUIImm(MCInst &Inst, uint32_t Insn,
uint64_t Address,
const MCDisassembler *Decoder) {
Inst.addOperand(MCOperand::createReg(RISCV::X0));
uint32_t Imm =
fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5);
return decodeCLUIImmOperand(Inst, Imm, Address, Decoder);
}

static DecodeStatus
decodeRVCInstrRdRs1UImmLog2XLenNonZero(MCInst &Inst, uint32_t Insn,
uint64_t Address,
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/RISCV/RISCVInstrInfoC.td
Original file line number Diff line number Diff line change
Expand Up @@ -629,15 +629,15 @@ def C_LI_HINT : RVInst16CI<0b010, 0b01, (outs GPRX0:$rd), (ins simm6:$imm),
"c.li", "$rd, $imm">,
Sched<[WriteIALU]> {
let Inst{11-7} = 0;
let DecoderMethod = "decodeRVCInstrRdSImm";
let DecoderMethod = "decodeRVCInstrRdSImm6";
}

def C_LUI_HINT : RVInst16CI<0b011, 0b01, (outs GPRX0:$rd),
(ins c_lui_imm:$imm),
"c.lui", "$rd, $imm">,
Sched<[WriteIALU]> {
let Inst{11-7} = 0;
let DecoderMethod = "decodeRVCInstrRdSImm";
let DecoderMethod = "decodeRVCInstrRdCLUIImm";
}

def C_MV_HINT : RVInst16CR<0b1000, 0b10, (outs GPRX0:$rs1), (ins GPRNoX0:$rs2),
Expand Down
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