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[X86] combineX86ShuffleChain - prefer combining to X86ISD::SHUF128 if PERMQ operands are splittable #133900

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Merged
merged 1 commit into from
Apr 1, 2025
Merged

[X86] combineX86ShuffleChain - prefer combining to X86ISD::SHUF128 if PERMQ operands are splittable #133900

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3 changes: 2 additions & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -39797,7 +39797,8 @@ static SDValue combineX86ShuffleChain(
// FIXME: Is there a better way to do this? is256BitLaneRepeatedShuffleMask
// doesn't work because our mask is for 128 bits and we don't have an MVT
// to match that.
bool PreferPERMQ = UnaryShuffle && isUndefOrInRange(ScaledMask[0], 0, 2) &&
bool PreferPERMQ = UnaryShuffle && !isFreeToSplitVector(V1, DAG) &&
isUndefOrInRange(ScaledMask[0], 0, 2) &&
isUndefOrInRange(ScaledMask[1], 0, 2) &&
isUndefOrInRange(ScaledMask[2], 2, 4) &&
isUndefOrInRange(ScaledMask[3], 2, 4) &&
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