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Reapply [AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. #135243

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Merged
merged 3 commits into from
Apr 10, 2025
Merged

Reapply [AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. #135243

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a4c9bf6
Revert "Revert "[AMDGPU] SIFixSgprCopies should not process twice VGP…
alex-t Apr 10, 2025
526ede9
LIT tests fixed
alex-t Apr 10, 2025
870ff13
Formatting issues addressed
alex-t Apr 10, 2025
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16 changes: 9 additions & 7 deletions llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,7 @@ class SIFixSGPRCopies {
unsigned NextVGPRToSGPRCopyID = 0;
MapVector<unsigned, V2SCopyInfo> V2SCopies;
DenseMap<MachineInstr *, SetVector<unsigned>> SiblingPenalty;
DenseSet<MachineInstr *> PHISources;

public:
MachineRegisterInfo *MRI;
Expand Down Expand Up @@ -691,10 +692,8 @@ bool SIFixSGPRCopies::run(MachineFunction &MF) {
TII->get(AMDGPU::COPY), NewDst)
.addReg(MO.getReg());
MO.setReg(NewDst);

// FIXME: We are transitively revisiting users of this
// instruction for every input.
analyzeVGPRToSGPRCopy(NewCopy);
PHISources.insert(NewCopy);
}
}
}
Expand Down Expand Up @@ -801,6 +800,7 @@ bool SIFixSGPRCopies::run(MachineFunction &MF) {
RegSequences.clear();
PHINodes.clear();
S2VCopies.clear();
PHISources.clear();

return true;
}
Expand Down Expand Up @@ -926,13 +926,13 @@ bool SIFixSGPRCopies::lowerSpecialCase(MachineInstr &MI,
}

void SIFixSGPRCopies::analyzeVGPRToSGPRCopy(MachineInstr* MI) {
if (PHISources.contains(MI))
return;
Register DstReg = MI->getOperand(0).getReg();
const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg);

V2SCopyInfo Info(getNextVGPRToSGPRCopyId(), MI,
TRI->getRegSizeInBits(*DstRC));
V2SCopies[Info.ID] = Info;

TRI->getRegSizeInBits(*DstRC));
SmallVector<MachineInstr *, 8> AnalysisWorklist;
// Needed because the SSA is not a tree but a graph and may have
// forks and joins. We should not then go same way twice.
Expand Down Expand Up @@ -971,16 +971,18 @@ void SIFixSGPRCopies::analyzeVGPRToSGPRCopy(MachineInstr* MI) {
}
} else if (Inst->getNumExplicitDefs() != 0) {
Register Reg = Inst->getOperand(0).getReg();
if (TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst))
if (Reg.isVirtual() && TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst)) {
for (auto &U : MRI->use_instructions(Reg))
Users.push_back(&U);
}
}
for (auto *U : Users) {
if (TII->isSALU(*U))
Info.SChain.insert(U);
AnalysisWorklist.push_back(U);
}
}
V2SCopies[Info.ID] = Info;
}

// The main function that computes the VGPR to SGPR copy score
Expand Down
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