[SPARC] Promote i32 CTTZ when we have VIS3

llvm/lib/Target/Sparc/SparcISelLowering.cpp

@@ -1757,7 +1757,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
 
     setOperationAction(ISD::CTPOP, MVT::i64,
                        Subtarget->usePopc() ? Legal : Expand);
-    setOperationAction(ISD::CTTZ, MVT::i64, Expand);
     setOperationAction(ISD::BSWAP, MVT::i64, Expand);
     setOperationAction(ISD::ROTL , MVT::i64, Expand);
     setOperationAction(ISD::ROTR , MVT::i64, Expand);
@@ -1817,8 +1816,7 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
   setOperationAction(ISD::FCOS , MVT::f32, Expand);
   setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
   setOperationAction(ISD::FREM , MVT::f32, Expand);
-  setOperationAction(ISD::FMA  , MVT::f32, Expand);
-  setOperationAction(ISD::CTTZ, MVT::i32, Expand);
+  setOperationAction(ISD::FMA, MVT::f32, Expand);
   setOperationAction(ISD::ROTL , MVT::i32, Expand);
   setOperationAction(ISD::ROTR , MVT::i32, Expand);
   setOperationAction(ISD::BSWAP, MVT::i32, Expand);
@@ -1994,17 +1992,36 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
     setOperationAction(ISD::CTLZ, MVT::i64, Legal);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Legal);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
+
+    setOperationAction(ISD::CTTZ, MVT::i32,
+                       Subtarget->is64Bit() ? Promote : Expand);
+    setOperationAction(ISD::CTTZ, MVT::i64, Expand);
+    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32,
+                       Subtarget->is64Bit() ? Promote : Expand);
+    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
   } else if (Subtarget->usePopc()) {
     setOperationAction(ISD::CTLZ, MVT::i32, Expand);
     setOperationAction(ISD::CTLZ, MVT::i64, Expand);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
+
+    setOperationAction(ISD::CTTZ, MVT::i32, Expand);
+    setOperationAction(ISD::CTTZ, MVT::i64, Expand);
+    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
+    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
   } else {
     setOperationAction(ISD::CTLZ, MVT::i32, Expand);
     setOperationAction(ISD::CTLZ, MVT::i64, Expand);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32,
                        Subtarget->is64Bit() ? Promote : LibCall);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, LibCall);
+
+    // FIXME here we don't have any ISA extensions that could help us, so to
+    // prevent large expansions those should be made into LibCalls.
+    setOperationAction(ISD::CTTZ, MVT::i32, Expand);
+    setOperationAction(ISD::CTTZ, MVT::i64, Expand);
+    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
+    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
   }
 
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
@@ -3594,6 +3611,15 @@ bool SparcTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
 
 bool SparcTargetLowering::isCtlzFast() const { return Subtarget->isVIS3(); }
 
+bool SparcTargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
+  // We lack native cttz, however,
+  // On 64-bit targets it is cheap to implement it in terms of popc.
+  if (Subtarget->is64Bit() && Subtarget->usePopc())
+    return true;
+  // Otherwise, implementing cttz in terms of ctlz is still cheap.
+  return isCheapToSpeculateCtlz(Ty);
+}
+
 // Override to disable global variable loading on Linux.
 void SparcTargetLowering::insertSSPDeclarations(Module &M) const {
   if (!Subtarget->isTargetLinux())

llvm/lib/Target/Sparc/SparcISelLowering.h

@@ -216,6 +216,8 @@ namespace llvm {
       return isCtlzFast();
     }
 
+    bool isCheapToSpeculateCttz(Type *Ty) const override;
+
     bool shouldInsertFencesForAtomic(const Instruction *I) const override {
       // FIXME: We insert fences for each atomics and generate
       // sub-optimal code for PSO/TSO. (Approximately nobody uses any