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Merged
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May 14, 2025
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a868174
add inreg test for sgpr purpose
Shoreshen Apr 17, 2025
6907c9a
update ll check lines
Shoreshen Apr 17, 2025
d98ca3e
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen Apr 21, 2025
110e6ca
fix comments
Shoreshen Apr 21, 2025
118e32f
fix comments
Shoreshen Apr 22, 2025
49b9def
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen Apr 22, 2025
2477b4a
Merge remote-tracking branch 'origin/main' into Add-inreg-bit-convert…
Shoreshen Apr 24, 2025
69b1ea2
merge conflict
Shoreshen Apr 24, 2025
ea25a59
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen Apr 27, 2025
a890dc0
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 3, 2025
0a47685
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 6, 2025
f7e4a87
fix comments
Shoreshen May 6, 2025
e61ee7e
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 7, 2025
1be6116
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 7, 2025
4c59949
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 8, 2025
e3aceef
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 9, 2025
63d2593
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 9, 2025
9ff368b
change tests name & merge
Shoreshen May 9, 2025
eadccb6
fix lit
Shoreshen May 9, 2025
5f85d75
Merge branch 'main' into Add-inreg-bit-convert-tests
Shoreshen May 12, 2025
e9e2248
Merge remote-tracking branch 'origin/main' into Add-inreg-bit-convert…
Shoreshen May 13, 2025
97e8ab8
fix conflicts
Shoreshen May 13, 2025
868d322
Update llvm/test/lit.cfg.py
arsenm May 13, 2025
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262,136 changes: 197,715 additions & 64,421 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll

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20,804 changes: 16,900 additions & 3,904 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll

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3,348 changes: 2,603 additions & 745 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll

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1,024 changes: 870 additions & 154 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll

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7,968 changes: 6,273 additions & 1,695 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll

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4,171 changes: 3,203 additions & 968 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll

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36,741 changes: 29,651 additions & 7,090 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll

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37,209 changes: 31,179 additions & 6,030 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll

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8,298 changes: 6,687 additions & 1,611 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll

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10,983 changes: 8,886 additions & 2,097 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll

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36 changes: 18 additions & 18 deletions llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
Original file line number Diff line number Diff line change
@@ -1,25 +1,25 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5

; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=VI %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11 %s
; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=VI %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s

define amdgpu_kernel void @bitcast_i8ptr_v16i8ptr(ptr addrspace(1) %out, ptr addrspace(1) %in) {
; GCN-LABEL: bitcast_i8ptr_v16i8ptr:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GCN-NEXT: s_mov_b32 s3, 0xf000
; GCN-NEXT: s_mov_b32 s2, -1
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s4
; GCN-NEXT: v_mov_b32_e32 v1, s5
; GCN-NEXT: v_mov_b32_e32 v2, s6
; GCN-NEXT: v_mov_b32_e32 v3, s7
; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NEXT: s_endpgm
; SI-LABEL: bitcast_i8ptr_v16i8ptr:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s6
; SI-NEXT: v_mov_b32_e32 v3, s7
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: bitcast_i8ptr_v16i8ptr:
; VI: ; %bb.0: ; %entry
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