[GVN][NFC] Add MSSA checks in tests 2/N

[madhur13490]

The previous patch in this series is #130261

[llvmbot]

@llvm/pr-subscribers-llvm-transforms

Author: Madhur Amilkanthwar (madhur13490)

Changes

The previous patch in this series is #130261

---

Patch is 54.07 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/137814.diff

6 Files Affected:

• (modified) llvm/test/Transforms/GVN/phi.ll (+4-1)
• (modified) llvm/test/Transforms/GVN/pre-compare.ll (+28-1)
• (modified) llvm/test/Transforms/GVN/readattrs.ll (+18-4)
• (modified) llvm/test/Transforms/GVN/setjmp.ll (+28-14)
• (modified) llvm/test/Transforms/GVN/tbaa.ll (+158-63)
• (modified) llvm/test/Transforms/GVN/vscale.ll (+315-139)

diff --git a/llvm/test/Transforms/GVN/phi.ll b/llvm/test/Transforms/GVN/phi.ll
index 5d4f227132a6f..5b607f7559c1b 100644
--- a/llvm/test/Transforms/GVN/phi.ll
+++ b/llvm/test/Transforms/GVN/phi.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -passes=gvn < %s | FileCheck %s
+; RUN: opt -S -passes=gvn < %s | FileCheck --check-prefixes=CHECK,MDEP %s
+; RUN: opt -S -passes='gvn<memoryssa;no-memdep>' < %s | FileCheck %s
 
 
 define i64 @test1(i1 %c, i64 %a, i64 %b) {
@@ -198,3 +199,5 @@ next:
   %phi = phi i64 [%a, %merge]
   ret i64 %phi
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; MDEP: {{.*}}
diff --git a/llvm/test/Transforms/GVN/pre-compare.ll b/llvm/test/Transforms/GVN/pre-compare.ll
index ea8fbce01bd6c..574d40dfb71d5 100644
--- a/llvm/test/Transforms/GVN/pre-compare.ll
+++ b/llvm/test/Transforms/GVN/pre-compare.ll
@@ -1,4 +1,6 @@
-; RUN: opt -passes=gvn -S < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=gvn -S < %s | FileCheck --check-prefixes=CHECK,MDEP %s
+; RUN: opt -passes='gvn<memoryssa;no-memdep>' -S < %s | FileCheck --check-prefixes=CHECK,MSSA %s
 
 ; C source:
 ;
@@ -37,6 +39,28 @@
 @.str3 = private unnamed_addr constant [12 x i8] c"step 2: %d\0A\00", align 1
 
 define void @f(i32 %x) noreturn nounwind uwtable ssp {
+; CHECK-LABEL: define void @f(
+; CHECK-SAME: i32 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X]], 1
+; CHECK-NEXT:    br i1 [[CMP]], label %[[FOR_COND_PREHEADER:.*]], label %[[IF_THEN:.*]]
+; CHECK:       [[IF_THEN]]:
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[X]], 2
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP1]], ptr @.str, ptr @.str1
+; CHECK-NEXT:    [[CALL:%.*]] = tail call i32 @puts(ptr [[COND]]) #[[ATTR1:[0-9]+]]
+; CHECK-NEXT:    br label %[[FOR_COND_PREHEADER]]
+; CHECK:       [[FOR_COND_PREHEADER]]:
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp eq i32 [[X]], 2
+; CHECK-NEXT:    br label %[[FOR_COND:.*]]
+; CHECK:       [[FOR_COND]]:
+; CHECK-NEXT:    [[CALL2:%.*]] = tail call i32 @puts(ptr @.str2) #[[ATTR1]]
+; CHECK-NEXT:    br i1 [[CMP3]], label %[[FOR_COND_BACKEDGE:.*]], label %[[IF_END5:.*]]
+; CHECK:       [[IF_END5]]:
+; CHECK-NEXT:    [[CALL6:%.*]] = tail call i32 (ptr, ...) @printf(ptr @.str3, i32 [[X]]) #[[ATTR1]]
+; CHECK-NEXT:    br label %[[FOR_COND_BACKEDGE]]
+; CHECK:       [[FOR_COND_BACKEDGE]]:
+; CHECK-NEXT:    br label %[[FOR_COND]]
+;
 entry:
   %cmp = icmp eq i32 %x, 1
   br i1 %cmp, label %for.cond.preheader, label %if.then
@@ -66,3 +90,6 @@ for.cond.backedge:                                ; preds = %if.end5, %for.cond
 declare i32 @puts(ptr nocapture) nounwind
 
 declare i32 @printf(ptr nocapture, ...) nounwind
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; MDEP: {{.*}}
+; MSSA: {{.*}}
diff --git a/llvm/test/Transforms/GVN/readattrs.ll b/llvm/test/Transforms/GVN/readattrs.ll
index b16c53adc0d4d..be018834014d5 100644
--- a/llvm/test/Transforms/GVN/readattrs.ll
+++ b/llvm/test/Transforms/GVN/readattrs.ll
@@ -1,4 +1,6 @@
-; RUN: opt -passes=gvn -S -o - < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=gvn -S -o - < %s | FileCheck --check-prefixes=CHECK,MDEP %s
+; RUN: opt -passes='gvn<memoryssa;no-memdep>' -S -o - < %s | FileCheck --check-prefixes=CHECK,MSSA %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-unknown-linux-gnu"
@@ -6,12 +8,24 @@ target triple = "x86_64-unknown-linux-gnu"
 declare void @use(ptr readonly nocapture)
 
 define i8 @test() {
+; MDEP-LABEL: define i8 @test() {
+; MDEP-NEXT:    [[A:%.*]] = alloca i8, align 1
+; MDEP-NEXT:    store i8 1, ptr [[A]], align 1
+; MDEP-NEXT:    call void @use(ptr [[A]])
+; MDEP-NEXT:    ret i8 1
+;
+; MSSA-LABEL: define i8 @test() {
+; MSSA-NEXT:    [[A:%.*]] = alloca i8, align 1
+; MSSA-NEXT:    store i8 1, ptr [[A]], align 1
+; MSSA-NEXT:    call void @use(ptr [[A]])
+; MSSA-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 1
+; MSSA-NEXT:    ret i8 [[B]]
+;
   %a = alloca i8
   store i8 1, ptr %a
   call void @use(ptr %a)
   %b = load i8, ptr %a
   ret i8 %b
-; CHECK-LABEL: define i8 @test(
-; CHECK: call void @use(ptr %a)
-; CHECK-NEXT: ret i8 1
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/Transforms/GVN/setjmp.ll b/llvm/test/Transforms/GVN/setjmp.ll
index 07b7028346760..7777038f89cb1 100644
--- a/llvm/test/Transforms/GVN/setjmp.ll
+++ b/llvm/test/Transforms/GVN/setjmp.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -S -passes=gvn < %s | FileCheck %s
-
+; RUN: opt -S -passes=gvn < %s | FileCheck --check-prefixes=CHECK,MDEP %s
+; RUN: opt -S -passes='gvn<memoryssa;no-memdep>' -verify-analysis-invalidation < %s | FileCheck --check-prefixes=CHECK,MSSA %s
 declare i32 @setjmp() returns_twice
 declare void @longjmp()
 declare ptr @malloc(i64)
@@ -38,18 +38,32 @@ if.end:
 
 ; We are still allowed to optimize non-volatile accesses to allocas.
 define i32 @test_alloca() {
-; CHECK-LABEL: define i32 @test_alloca() {
-; CHECK-NEXT:    [[ALLOC:%.*]] = alloca i43, align 8
-; CHECK-NEXT:    store i32 10, ptr [[ALLOC]], align 4
-; CHECK-NEXT:    [[SJ:%.*]] = call i32 @setjmp()
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[SJ]], 0
-; CHECK-NEXT:    br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
-; CHECK:       [[IF_THEN]]:
-; CHECK-NEXT:    store i32 20, ptr [[ALLOC]], align 4
-; CHECK-NEXT:    call void @longjmp()
-; CHECK-NEXT:    unreachable
-; CHECK:       [[IF_END]]:
-; CHECK-NEXT:    ret i32 10
+; MDEP-LABEL: define i32 @test_alloca() {
+; MDEP-NEXT:    [[ALLOC:%.*]] = alloca i43, align 8
+; MDEP-NEXT:    store i32 10, ptr [[ALLOC]], align 4
+; MDEP-NEXT:    [[SJ:%.*]] = call i32 @setjmp()
+; MDEP-NEXT:    [[CMP:%.*]] = icmp eq i32 [[SJ]], 0
+; MDEP-NEXT:    br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+; MDEP:       [[IF_THEN]]:
+; MDEP-NEXT:    store i32 20, ptr [[ALLOC]], align 4
+; MDEP-NEXT:    call void @longjmp()
+; MDEP-NEXT:    unreachable
+; MDEP:       [[IF_END]]:
+; MDEP-NEXT:    ret i32 10
+;
+; MSSA-LABEL: define i32 @test_alloca() {
+; MSSA-NEXT:    [[ALLOC:%.*]] = alloca i43, align 8
+; MSSA-NEXT:    store i32 10, ptr [[ALLOC]], align 4
+; MSSA-NEXT:    [[SJ:%.*]] = call i32 @setjmp()
+; MSSA-NEXT:    [[CMP:%.*]] = icmp eq i32 [[SJ]], 0
+; MSSA-NEXT:    br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+; MSSA:       [[IF_THEN]]:
+; MSSA-NEXT:    store i32 20, ptr [[ALLOC]], align 4
+; MSSA-NEXT:    call void @longjmp()
+; MSSA-NEXT:    unreachable
+; MSSA:       [[IF_END]]:
+; MSSA-NEXT:    [[RES:%.*]] = load i32, ptr [[ALLOC]], align 4
+; MSSA-NEXT:    ret i32 [[RES]]
 ;
   %alloc = alloca i43
   store i32 10, ptr %alloc, align 4
diff --git a/llvm/test/Transforms/GVN/tbaa.ll b/llvm/test/Transforms/GVN/tbaa.ll
index b5dd3867bdbc2..366dfeca8b758 100644
--- a/llvm/test/Transforms/GVN/tbaa.ll
+++ b/llvm/test/Transforms/GVN/tbaa.ll
@@ -1,12 +1,20 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -passes=gvn -S < %s | FileCheck %s
+; RUN: opt -passes=gvn -S < %s | FileCheck --check-prefixes=CHECK,MDEP %s
+; RUN: opt -passes='gvn<memoryssa;no-memdep>' -S < %s | FileCheck --check-prefixes=CHECK,MSSA %s
 
 define i32 @test1(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test1(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0:![0-9]+]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test1(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0:![0-9]+]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test1(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0:![0-9]+]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]])
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !0
   %b = call i32 @foo(ptr %p)
@@ -15,11 +23,18 @@ define i32 @test1(ptr %p, ptr %q) {
 }
 
 define i32 @test2(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test2(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test2(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test2(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !0
   %b = call i32 @foo(ptr %p), !tbaa !0
@@ -28,11 +43,18 @@ define i32 @test2(ptr %p, ptr %q) {
 }
 
 define i32 @test3(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test3(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA4:![0-9]+]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test3(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA4:![0-9]+]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test3(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA4:![0-9]+]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA4]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !3
   %b = call i32 @foo(ptr %p), !tbaa !3
@@ -41,11 +63,18 @@ define i32 @test3(ptr %p, ptr %q) {
 }
 
 define i32 @test4(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test4(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA6:![0-9]+]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test4(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA6:![0-9]+]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test4(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA6:![0-9]+]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !1
   %b = call i32 @foo(ptr %p), !tbaa !0
@@ -54,11 +83,18 @@ define i32 @test4(ptr %p, ptr %q) {
 }
 
 define i32 @test5(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test5(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test5(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test5(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA6]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !0
   %b = call i32 @foo(ptr %p), !tbaa !1
@@ -67,11 +103,18 @@ define i32 @test5(ptr %p, ptr %q) {
 }
 
 define i32 @test6(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test6(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test6(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test6(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA0]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA4]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !0
   %b = call i32 @foo(ptr %p), !tbaa !3
@@ -80,11 +123,18 @@ define i32 @test6(ptr %p, ptr %q) {
 }
 
 define i32 @test7(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test7(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA7:![0-9]+]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test7(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA7:![0-9]+]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test7(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA7:![0-9]+]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA4]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !4
   %b = call i32 @foo(ptr %p), !tbaa !3
@@ -93,10 +143,18 @@ define i32 @test7(ptr %p, ptr %q) {
 }
 
 define i32 @test8(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test8(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    store i32 15, ptr [[P]], align 4
-; CHECK-NEXT:    ret i32 0
+; MDEP-LABEL: define i32 @test8(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    store i32 15, ptr [[P]], align 4
+; MDEP-NEXT:    ret i32 0
+;
+; MSSA-LABEL: define i32 @test8(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = load i32, ptr [[Q]], align 4, !tbaa [[TBAA10:![0-9]+]]
+; MSSA-NEXT:    store i32 15, ptr [[P]], align 4
+; MSSA-NEXT:    [[B:%.*]] = load i32, ptr [[Q]], align 4, !tbaa [[TBAA10]]
+; MSSA-NEXT:    [[C:%.*]] = sub i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
 ; Since we know the location is invariant, we can forward the
 ; load across the potentially aliasing store.
@@ -109,10 +167,18 @@ define i32 @test8(ptr %p, ptr %q) {
 }
 
 define i32 @test9(ptr %p, ptr %q) {
-; CHECK-LABEL: define i32 @test9(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    ret i32 0
+; MDEP-LABEL: define i32 @test9(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    call void @clobber()
+; MDEP-NEXT:    ret i32 0
+;
+; MSSA-LABEL: define i32 @test9(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = load i32, ptr [[Q]], align 4, !tbaa [[TBAA10]]
+; MSSA-NEXT:    call void @clobber()
+; MSSA-NEXT:    [[B:%.*]] = load i32, ptr [[Q]], align 4, !tbaa [[TBAA10]]
+; MSSA-NEXT:    [[C:%.*]] = sub i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
 ; Since we know the location is invariant, we can forward the
 ; load across the potentially aliasing store (within the call).
@@ -127,11 +193,18 @@ define i32 @test9(ptr %p, ptr %q) {
 define i32 @test10(ptr %p, ptr %q) {
 ; If one access encloses the other, then the merged access is the enclosed one
 ; and not just the common final access type.
-; CHECK-LABEL: define i32 @test10(
-; CHECK-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
-; CHECK-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA10:![0-9]+]]
-; CHECK-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
-; CHECK-NEXT:    ret i32 [[C]]
+; MDEP-LABEL: define i32 @test10(
+; MDEP-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MDEP-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA10:![0-9]+]]
+; MDEP-NEXT:    [[C:%.*]] = add i32 [[A]], [[A]]
+; MDEP-NEXT:    ret i32 [[C]]
+;
+; MSSA-LABEL: define i32 @test10(
+; MSSA-SAME: ptr [[P:%.*]], ptr [[Q:%.*]]) {
+; MSSA-NEXT:    [[A:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA13:![0-9]+]]
+; MSSA-NEXT:    [[B:%.*]] = call i32 @foo(ptr [[P]]), !tbaa [[TBAA17:![0-9]+]]
+; MSSA-NEXT:    [[C:%.*]] = add i32 [[A]], [[B]]
+; MSSA-NEXT:    ret i32 [[C]]
 ;
   %a = call i32 @foo(ptr %p), !tbaa !15  ; TAG_X_i
   %b = call i32 @foo(ptr %p), !tbaa !19  ; TAG_Y_x_i
@@ -165,18 +238,40 @@ declare i32 @foo(ptr) readonly
 !9 = !{!"yet another root"}
 !10 = !{!"node", !9, i64 1}
 ;.
-; CHECK: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
-; CHECK: [[META1]] = !{!"C", [[META2:![0-9]+]]}
-; CHECK: [[META2]] = !{!"A", [[META3:![0-9]+]]}
-; CHECK: [[META3]] = !{!"tbaa root"}
-; CHECK: [[TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}
-; CHECK: [[META5]] = !{!"B", [[META2]]}
-; CHECK: [[TBAA6]] = !{[[META2]], [[META2]], i64 0}
-; CHECK: [[TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
-; CHECK: [[META8]] = !{!"scalar type", [[META9:![0-9]+]]}
-; CHECK: [[META9]] = !{!"another root"}
-; CHECK: [[TBAA10]] = !{[[META11:![0-9]+]], [[META12:![0-9]+]], i64 0}
-; CHECK: [[META11]] = !{!"struct X", [[META12]], i64 0}
-; CHECK: [[META12]] = !{!"int", [[META13:![0-9]+]], i64 0}
-; CHECK: [[META13]] = !{!"char", [[META3]], i64 0}
+; MDEP: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
+; MDEP: [[META1]] = !{!"C", [[META2:![0-9]+]]}
+; MDEP: [[META2]] = !{!"A", [[META3:![0-9]+]]}
+; MDEP: [[META3]] = !{!"tbaa root"}
+; MDEP: [[TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}
+; MDEP: [[META5]] = !{!"B", [[META2]]}
+; MDEP: [[TBAA6]] = !{[[META2]], [[META2]], i64 0}
+; MDEP: [[TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
+; MDEP: [[META8]] = !{!"scalar type", [[META9:![0-9]+]]}
+; MDEP: [[META9]] = !{!"another root"}
+; MDEP: [[TBAA10]] = !{[[META11:![0-9]+]], [[META12:![0-9]+]], i64 0}
+; MDEP: [[META11]] = !{!"struct X", [[META12]], i64 0}
+; MDEP: [[META12]] = !{!"int", [[META13:![0-9]+]], i64 0}
+; MDEP: [[META13]] = !{!"char", [[META3]], i64 0}
+;.
+; MSSA: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
+; MSSA: [[META1]] = !{!"C", [[META2:![0-9]+]]}
+; MSSA: [[META2]] = !{!"A", [[META3:![0-9]+]]}
+; MSSA: [[META3]] = !{!"tbaa root"}
+; MSSA: [[TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}
+; MSSA: [[META5]] = !{!"B", [[META2]]}
+; MSSA: [[TBAA6]] = !{[[META2]], [[META2]], i64 0}
+; MSSA: [[TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
+; MSSA: [[META8]] = !{!"scalar type", [[META9:![0-9]+]]}
+; MSSA: [[META9]] = !{!"another root"}
+; MSSA: [[TBAA10]] = !{[[META11:![0-9]+]], [[META11]], i64 0, i64 1}
+; MSSA: [[META11]] = !{!"node", [[META12:![0-9]+]]}
+; MSSA: [[META12]] = !{!"yet another root"}
+; MSSA: [[TBAA13]] = !{[[META14:![0-9]+]], [[META15:![0-9]+]], i64 0}
+; MSSA: [[META14]] = !{!"struct X", [[META15]], i64 0}
+; MSSA: [[META15]] = !{!"int", [[META16:![0-9]+]], i64 0}
+; MSSA: [[META16]] = !{!"char", [[META3]], i64 0}
+; MSSA: [[TBAA17]] = !{[[META18:![0-9]+]], [[META15]], i64 0}
+; MSSA: [[META18]] = !{!"struct Y", [[META14]], i64 0}
 ;.
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/Transforms/GVN/vscale.ll b/llvm/test/Transforms/GVN/vscale.ll
index d7b07b9891c41..646a67d15d392 100644
--- a/llvm/test/Transforms/GVN/vscale.ll
+++ b/llvm/test/Transforms/GVN/vscale.ll
@@ -1,14 +1,22 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S < %...
[truncated]

[github-actions]

⚠️ undef deprecator found issues in your code. ⚠️

You can test this locally with the following command:

git diff -U0 --pickaxe-regex -S '([^a-zA-Z0-9#_-]undef[^a-zA-Z0-9_-]|UndefValue::get)' 'HEAD~1' HEAD llvm/test/Transforms/GVN/phi.ll llvm/test/Transforms/GVN/pre-compare.ll llvm/test/Transforms/GVN/readattrs.ll llvm/test/Transforms/GVN/setjmp.ll llvm/test/Transforms/GVN/tbaa.ll llvm/test/Transforms/GVN/vscale.ll

The following files introduce new uses of undef:

• llvm/test/Transforms/GVN/vscale.ll

Undef is now deprecated and should only be used in the rare cases where no replacement is possible. For example, a load of uninitialized memory yields undef. You should use poison values for placeholders instead.

In tests, avoid using undef and having tests that trigger undefined behavior. If you need an operand with some unimportant value, you can add a new argument to the function and use that instead.

For example, this is considered a bad practice:

define void @fn() {
  ...
  br i1 undef, ...
}

Please use the following instead:

define void @fn(i1 %cond) {
  ...
  br i1 %cond, ...
}

Please refer to the Undefined Behavior Manual for more information.

[madhur13490]

Gentle Ping @antoniofrighetto @nikic !

[antoniofrighetto]

LG, thanks! (Maybe worth adding NFC to these series of patches?)

[madhur13490]

LG, thanks! (Maybe worth adding NFC to these series of patches?)

Thanks, I will do.