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merged 2 commits into from
May 1, 2025

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@jzc jzc commented May 1, 2025

Following #137070, this PR adds an initial set of Intel OffloadArch values with corresponding predicates that will be used in SYCL offloading. More Intel architectures will be added in a future PR.

@llvmbot llvmbot added clang Clang issues not falling into any other category clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:codegen IR generation bugs: mangling, exceptions, etc. clang:openmp OpenMP related changes to Clang labels May 1, 2025
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llvmbot commented May 1, 2025

@llvm/pr-subscribers-clang

@llvm/pr-subscribers-clang-codegen

Author: Justin Cai (jzc)

Changes

Following #137070, this PR adds an initial set of Intel OffloadArch values with corresponding predicates that will be used in SYCL offloading. More Intel architectures will be added in a future PR.


Full diff: https://github.com/llvm/llvm-project/pull/138158.diff

6 Files Affected:

  • (modified) clang/include/clang/Basic/OffloadArch.h (+19)
  • (modified) clang/lib/Basic/OffloadArch.cpp (+4)
  • (modified) clang/lib/Basic/Targets/NVPTX.cpp (+2)
  • (modified) clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp (+2)
  • (modified) clang/unittests/Basic/CMakeLists.txt (+1)
  • (added) clang/unittests/Basic/OffloadArchTest.cpp (+36)
diff --git a/clang/include/clang/Basic/OffloadArch.h b/clang/include/clang/Basic/OffloadArch.h
index c5ccd17e7a8be..c681f99f2e146 100644
--- a/clang/include/clang/Basic/OffloadArch.h
+++ b/clang/include/clang/Basic/OffloadArch.h
@@ -101,6 +101,13 @@ enum class OffloadArch {
   AMDGCNSPIRV,
   Generic, // A processor model named 'generic' if the target backend defines a
            // public one.
+  // Note: this is an initial list of Intel GPU and GPU offloading
+  // architectures. The list will be expanded later as support for more
+  // architectures is added.
+  // Intel CPUs
+  GRANITERAPIDS,
+  // Intel GPUs
+  BMG_G21,
   LAST,
 
   CudaDefault = OffloadArch::SM_52,
@@ -116,6 +123,18 @@ static inline bool IsAMDOffloadArch(OffloadArch A) {
   return A >= OffloadArch::GFX600 && A < OffloadArch::Generic;
 }
 
+static inline bool IsIntelCPUOffloadArch(OffloadArch Arch) {
+  return Arch >= OffloadArch::GRANITERAPIDS && Arch < OffloadArch::BMG_G21;
+}
+
+static inline bool IsIntelGPUOffloadArch(OffloadArch Arch) {
+  return Arch >= OffloadArch::BMG_G21 && Arch < OffloadArch::LAST;
+}
+
+static inline bool IsIntelOffloadArch(OffloadArch Arch) {
+  return IsIntelCPUOffloadArch(Arch) || IsIntelGPUOffloadArch(Arch);
+}
+
 const char *OffloadArchToString(OffloadArch A);
 const char *OffloadArchToVirtualArchString(OffloadArch A);
 
diff --git a/clang/lib/Basic/OffloadArch.cpp b/clang/lib/Basic/OffloadArch.cpp
index 5e29742478b99..a019f0ac18c84 100644
--- a/clang/lib/Basic/OffloadArch.cpp
+++ b/clang/lib/Basic/OffloadArch.cpp
@@ -87,6 +87,10 @@ static const OffloadArchToStringMap ArchNames[] = {
     GFX(1200), // gfx1200
     GFX(1201), // gfx1201
     {OffloadArch::AMDGCNSPIRV, "amdgcnspirv", "compute_amdgcn"},
+    // Intel CPUs
+    {OffloadArch::GRANITERAPIDS, "graniterapids", ""},
+    // Intel GPUS
+    {OffloadArch::BMG_G21, "bmg_g21", ""},
     {OffloadArch::Generic, "generic", ""},
     // clang-format on
 };
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp
index 08c8460045c6a..42b66d3559f6a 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -241,6 +241,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,
       case OffloadArch::GFX1201:
       case OffloadArch::AMDGCNSPIRV:
       case OffloadArch::Generic:
+      case OffloadArch::GRANITERAPIDS:
+      case OffloadArch::BMG_G21:
       case OffloadArch::LAST:
         break;
       case OffloadArch::UNKNOWN:
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index 59a5f7b914ce5..aa97422d54ede 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2334,6 +2334,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const OMPRequiresDecl *D) {
       case OffloadArch::GFX1201:
       case OffloadArch::AMDGCNSPIRV:
       case OffloadArch::Generic:
+      case OffloadArch::GRANITERAPIDS:
+      case OffloadArch::BMG_G21:
       case OffloadArch::UNUSED:
       case OffloadArch::UNKNOWN:
         break;
diff --git a/clang/unittests/Basic/CMakeLists.txt b/clang/unittests/Basic/CMakeLists.txt
index b0e0a97168757..8c8baa57b64e7 100644
--- a/clang/unittests/Basic/CMakeLists.txt
+++ b/clang/unittests/Basic/CMakeLists.txt
@@ -7,6 +7,7 @@ add_distinct_clang_unittest(BasicTests
   FileEntryTest.cpp
   FileManagerTest.cpp
   LineOffsetMappingTest.cpp
+  OffloadArchTest.cpp
   SanitizersTest.cpp
   SarifTest.cpp
   SourceManagerTest.cpp
diff --git a/clang/unittests/Basic/OffloadArchTest.cpp b/clang/unittests/Basic/OffloadArchTest.cpp
new file mode 100644
index 0000000000000..c19ad0043d774
--- /dev/null
+++ b/clang/unittests/Basic/OffloadArchTest.cpp
@@ -0,0 +1,36 @@
+//===- unittests/Basic/OffloadArchTest.cpp - Test OffloadArch -------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "clang/Basic/OffloadArch.h"
+#include "gtest/gtest.h"
+
+using namespace clang;
+
+TEST(OffloadArchTest, basic) {
+  EXPECT_TRUE(IsNVIDIAOffloadArch(OffloadArch::SM_20));
+  EXPECT_TRUE(IsNVIDIAOffloadArch(OffloadArch::SM_120a));
+  EXPECT_FALSE(IsNVIDIAOffloadArch(OffloadArch::GFX600));
+
+  EXPECT_FALSE(IsAMDOffloadArch(OffloadArch::SM_120a));
+  EXPECT_TRUE(IsAMDOffloadArch(OffloadArch::GFX600));
+  EXPECT_TRUE(IsAMDOffloadArch(OffloadArch::GFX1201));
+  EXPECT_TRUE(IsAMDOffloadArch(OffloadArch::GFX12_GENERIC));
+  EXPECT_TRUE(IsAMDOffloadArch(OffloadArch::AMDGCNSPIRV));
+  EXPECT_FALSE(IsAMDOffloadArch(OffloadArch::GRANITERAPIDS));
+
+  EXPECT_TRUE(IsIntelOffloadArch(OffloadArch::GRANITERAPIDS));
+  EXPECT_TRUE(IsIntelCPUOffloadArch(OffloadArch::GRANITERAPIDS));
+  EXPECT_FALSE(IsIntelGPUOffloadArch(OffloadArch::GRANITERAPIDS));
+  EXPECT_TRUE(IsIntelOffloadArch(OffloadArch::BMG_G21));
+  EXPECT_FALSE(IsIntelCPUOffloadArch(OffloadArch::BMG_G21));
+  EXPECT_TRUE(IsIntelGPUOffloadArch(OffloadArch::BMG_G21));
+
+  EXPECT_FALSE(IsNVIDIAOffloadArch(OffloadArch::Generic));
+  EXPECT_FALSE(IsAMDOffloadArch(OffloadArch::Generic));
+  EXPECT_FALSE(IsIntelOffloadArch(OffloadArch::Generic));
+}

@asudarsa asudarsa requested a review from jhuber6 May 1, 2025 16:44
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Lg with a nit.

Comment on lines 104 to 106
// Note: this is an initial list of Intel GPU and GPU offloading
// architectures. The list will be expanded later as support for more
// architectures is added.
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I feel like this is unnecessary

@jhuber6 jhuber6 merged commit faf4e8a into llvm:main May 1, 2025
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llvm-ci commented May 1, 2025

LLVM Buildbot has detected a new failure on builder fuchsia-x86_64-linux running on fuchsia-debian-64-us-central1-a-1 while building clang at step 4 "annotate".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/11/builds/14237

Here is the relevant piece of the build log for the reference
Step 4 (annotate) failure: 'python ../llvm-zorg/zorg/buildbot/builders/annotated/fuchsia-linux.py ...' (failure)
...
[679/1364] Building CXX object tools/yaml2obj/CMakeFiles/yaml2obj.dir/yaml2obj.cpp.o
[680/1364] Building CXX object unittests/ADT/CMakeFiles/ADTTests.dir/SCCIteratorTest.cpp.o
[681/1364] Linking CXX executable bin/yaml2obj
[681/1364] Running lld test suite
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using ld.lld: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/ld.lld
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using lld-link: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/lld-link
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using ld64.lld: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/ld64.lld
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using wasm-ld: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/wasm-ld
-- Testing: 3089 tests, 60 workers --
Testing:  0.. 10.. 20
FAIL: lld :: ELF/basic-block-sections-pc32reloc.s (785 of 3089)
******************** TEST 'lld :: ELF/basic-block-sections-pc32reloc.s' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-mc -filetype=obj -triple=x86_64 /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s -o /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o # RUN: at line 7
+ /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-mc -filetype=obj -triple=x86_64 /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s -o /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o
/var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-objdump -dr /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o| /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/FileCheck /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s --check-prefix=RELOC # RUN: at line 8
+ /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-objdump -dr /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o
+ /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/FileCheck /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s --check-prefix=RELOC
/var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s:13:15: error: RELOC-NEXT: is not on the line after the previous match
# RELOC-NEXT: R_X86_64_PC32
              ^
<stdin>:11:20: note: 'next' match was here
 000000000000000a: R_X86_64_PC32 .text-0x1
                   ^
<stdin>:2:65: note: previous match ended here
/var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o: file format elf64-x86-64
                                                                ^
<stdin>:3:1: note: non-matching line after previous match is here

^

Input file: <stdin>
Check file: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s

-dump-input=help explains the following input dump.

Input was:
<<<<<<
         .
         .
         .
         6: 0000000000000000 <foo>: 
         7:  0: 0f 1f 00 nopl (%rax) 
         8:  3: 0f 84 00 00 00 00 je 0x9 <foo+0x9> 
         9:  0000000000000005: R_X86_64_PLT32 .text-0x4 
        10:  9: e9 00 00 00 00 jmp 0xe <foo+0xe> 
Step 7 (check) failure: check (failure)
...
[679/1364] Building CXX object tools/yaml2obj/CMakeFiles/yaml2obj.dir/yaml2obj.cpp.o
[680/1364] Building CXX object unittests/ADT/CMakeFiles/ADTTests.dir/SCCIteratorTest.cpp.o
[681/1364] Linking CXX executable bin/yaml2obj
[681/1364] Running lld test suite
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using ld.lld: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/ld.lld
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using lld-link: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/lld-link
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using ld64.lld: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/ld64.lld
llvm-lit: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using wasm-ld: /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/wasm-ld
-- Testing: 3089 tests, 60 workers --
Testing:  0.. 10.. 20
FAIL: lld :: ELF/basic-block-sections-pc32reloc.s (785 of 3089)
******************** TEST 'lld :: ELF/basic-block-sections-pc32reloc.s' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-mc -filetype=obj -triple=x86_64 /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s -o /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o # RUN: at line 7
+ /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-mc -filetype=obj -triple=x86_64 /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s -o /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o
/var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-objdump -dr /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o| /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/FileCheck /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s --check-prefix=RELOC # RUN: at line 8
+ /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/llvm-objdump -dr /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o
+ /var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/bin/FileCheck /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s --check-prefix=RELOC
/var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s:13:15: error: RELOC-NEXT: is not on the line after the previous match
# RELOC-NEXT: R_X86_64_PC32
              ^
<stdin>:11:20: note: 'next' match was here
 000000000000000a: R_X86_64_PC32 .text-0x1
                   ^
<stdin>:2:65: note: previous match ended here
/var/lib/buildbot/fuchsia-x86_64-linux/build/llvm-build-tm3_ojmp/tools/lld/test/ELF/Output/basic-block-sections-pc32reloc.s.tmp.o: file format elf64-x86-64
                                                                ^
<stdin>:3:1: note: non-matching line after previous match is here

^

Input file: <stdin>
Check file: /var/lib/buildbot/fuchsia-x86_64-linux/llvm-project/lld/test/ELF/basic-block-sections-pc32reloc.s

-dump-input=help explains the following input dump.

Input was:
<<<<<<
         .
         .
         .
         6: 0000000000000000 <foo>: 
         7:  0: 0f 1f 00 nopl (%rax) 
         8:  3: 0f 84 00 00 00 00 je 0x9 <foo+0x9> 
         9:  0000000000000005: R_X86_64_PLT32 .text-0x4 
        10:  9: e9 00 00 00 00 jmp 0xe <foo+0xe> 

IanWood1 pushed a commit to IanWood1/llvm-project that referenced this pull request May 6, 2025
Following llvm#137070, this PR adds an initial set of Intel `OffloadArch`
values with corresponding predicates that will be used in SYCL
offloading. More Intel architectures will be added in a future PR.
IanWood1 pushed a commit to IanWood1/llvm-project that referenced this pull request May 6, 2025
Following llvm#137070, this PR adds an initial set of Intel `OffloadArch`
values with corresponding predicates that will be used in SYCL
offloading. More Intel architectures will be added in a future PR.
IanWood1 pushed a commit to IanWood1/llvm-project that referenced this pull request May 6, 2025
Following llvm#137070, this PR adds an initial set of Intel `OffloadArch`
values with corresponding predicates that will be used in SYCL
offloading. More Intel architectures will be added in a future PR.
GeorgeARM pushed a commit to GeorgeARM/llvm-project that referenced this pull request May 7, 2025
Following llvm#137070, this PR adds an initial set of Intel `OffloadArch`
values with corresponding predicates that will be used in SYCL
offloading. More Intel architectures will be added in a future PR.
Ankur-0429 pushed a commit to Ankur-0429/llvm-project that referenced this pull request May 9, 2025
Following llvm#137070, this PR adds an initial set of Intel `OffloadArch`
values with corresponding predicates that will be used in SYCL
offloading. More Intel architectures will be added in a future PR.
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