Skip to content

[llvm] Remove redundant control flow (NFC) #138304

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 0 additions & 2 deletions llvm/lib/Analysis/KernelInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -313,8 +313,6 @@ void KernelInfo::emitKernelInfo(Function &F, FunctionAnalysisManager &FAM,
REMARK_PROPERTY(Invokes);
REMARK_PROPERTY(FlatAddrspaceAccesses);
#undef REMARK_PROPERTY

return;
}

PreservedAnalyses KernelInfoPrinter::run(Function &F,
Expand Down
5 changes: 2 additions & 3 deletions llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3597,9 +3597,8 @@ void IRTranslator::translateDbgDeclareRecord(Value *Address, bool HasArgList,
// A dbg.declare describes the address of a source variable, so lower it
// into an indirect DBG_VALUE.
MIRBuilder.setDebugLoc(DL);
MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address),
Variable, Expression);
return;
MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address), Variable,
Expression);
}

void IRTranslator::translateDbgInfo(const Instruction &Inst,
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/PeepholeOptimizer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -521,7 +521,7 @@ class PeepholeOptimizer : private MachineFunction::Delegate {
DenseMap<RegSubRegPair, MachineInstr *> CopySrcMIs;

// MachineFunction::Delegate implementation. Used to maintain CopySrcMIs.
void MF_HandleInsertion(MachineInstr &MI) override { return; }
void MF_HandleInsertion(MachineInstr &MI) override {}

bool getCopySrc(MachineInstr &MI, RegSubRegPair &SrcPair) {
if (!MI.isCopy())
Expand Down
3 changes: 0 additions & 3 deletions llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1389,7 +1389,6 @@ void DWARFVerifier::verifyNameIndexBuckets(const DWARFDebugNames::NameIndex &NI,
}
NextUncovered = std::max(NextUncovered, Idx);
}
return;
}

void DWARFVerifier::verifyNameIndexAttribute(
Expand Down Expand Up @@ -1469,7 +1468,6 @@ void DWARFVerifier::verifyNameIndexAttribute(
});
return;
}
return;
}

void DWARFVerifier::verifyNameIndexAbbrevs(
Expand Down Expand Up @@ -2068,7 +2066,6 @@ void DWARFVerifier::verifyDebugNames(const DWARFSection &AccelSection,
}
}
}
return;
}

bool DWARFVerifier::handleAccelTables() {
Expand Down
4 changes: 1 addition & 3 deletions llvm/lib/IR/ConvergenceVerifier.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -34,9 +34,7 @@ auto GenericConvergenceVerifier<SSAContext>::getConvOp(const Instruction &I)

template <>
void GenericConvergenceVerifier<SSAContext>::checkConvergenceTokenProduced(
const Instruction &I) {
return;
}
const Instruction &I) {}

template <>
const Instruction *
Expand Down
1 change: 0 additions & 1 deletion llvm/lib/Support/Mustache.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -707,7 +707,6 @@ void ASTNode::renderSectionLambdas(const json::Value &Contexts,
Parser P = Parser(LambdaStr);
AstPtr LambdaNode = P.parse(Partials, Lambdas, SectionLambdas, Escapes);
LambdaNode->render(Contexts, OS);
return;
}

void Template::render(const json::Value &Data, llvm::raw_ostream &OS) {
Expand Down
1 change: 0 additions & 1 deletion llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5902,7 +5902,6 @@ static void ReplaceTcgen05Ld(SDNode *N, SelectionDAG &DAG,
SDValue BuildVector = DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, ScalarRes);
Results.push_back(BuildVector); // Build Vector
Results.push_back(Chain); // Chain
return;
}

static void ReplaceINTRINSIC_W_CHAIN(SDNode *N, SelectionDAG &DAG,
Expand Down
2 changes: 0 additions & 2 deletions llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -357,8 +357,6 @@ static void lowerExpectAssume(IntrinsicInst *II) {
} else {
llvm_unreachable("Unknown intrinsic");
}

return;
}

static bool toSpvOverloadedIntrinsic(IntrinsicInst *II, Intrinsic::ID NewID,
Expand Down
1 change: 0 additions & 1 deletion llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1295,7 +1295,6 @@ static void analyzeCostOfVecReduction(const IntrinsicInst &II,
}
CostAfterReduction = TTI.getArithmeticReductionCost(ReductionOpc, VecRedTy,
std::nullopt, CostKind);
return;
}

bool VectorCombine::foldBinopOfReductions(Instruction &I) {
Expand Down