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MIPSr6: Set FMAXNUM and FMINNUM as Legal #139009

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Merged
merged 2 commits into from
May 8, 2025
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MIPSr6: Set FMAXNUM and FMINNUM as Legal #139009

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df47069
MIPSr6: Set FMAXNUM and FMINNUM as Legal
wzssyqa May 8, 2025
49d911a
Update testcase
wzssyqa May 8, 2025
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12 changes: 12 additions & 0 deletions llvm/lib/Target/Mips/Mips32r6InstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1122,15 +1122,27 @@ let AdditionalPredicates = [NotInMicroMips] in {
def : MipsPat<(fmaxnum_ieee f32:$lhs, f32:$rhs),
(MAX_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
(MAX_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fmaxnum_ieee f64:$lhs, f64:$rhs),
(MAX_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
(MAX_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum_ieee f32:$lhs, f32:$rhs),
(MIN_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
(MIN_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum_ieee f64:$lhs, f64:$rhs),
(MIN_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
(MIN_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(f32 (fcanonicalize f32:$src)),
(MIN_S f32:$src, f32:$src)>,
ISA_MIPS32R6;
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8 changes: 4 additions & 4 deletions llvm/lib/Target/Mips/MipsISelLowering.cpp
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Expand Up @@ -365,12 +365,12 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
if (Subtarget.hasMips32r6()) {
setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM, MVT::f32, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f32, Expand);
setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal);
setOperationAction(ISD::FMINNUM, MVT::f64, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f64, Expand);
setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
setOperationAction(ISD::IS_FPCLASS, MVT::f32, Legal);
setOperationAction(ISD::IS_FPCLASS, MVT::f64, Legal);
} else {
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85 changes: 33 additions & 52 deletions llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
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@@ -1,80 +1,61 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc %s -mtriple=mipsisa32r6el-linux-gnu -o - | \
; RUN: FileCheck %s --check-prefix=MIPS32R6EL
; RUN: llc %s -mtriple=mipsisa64r6el-linux-gnuabi64 -o - | \
; RUN: FileCheck %s --check-prefix=MIPS64R6EL

define float @mins(float %x, float %y) {
; MIPS32R6EL-LABEL: mins
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.s $f0, $f1, $f0
; MIPS32R6EL-LABEL: mins:
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: mins
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.s $f0, $f1, $f0

; MIPS64R6EL-LABEL: mins:
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13
%r = tail call float @llvm.minnum.f32(float %x, float %y)
ret float %r
}

define float @maxs(float %x, float %y) {
; MIPS32R6EL-LABEL: maxs
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.s $f0, $f1, $f0
; MIPS32R6EL-LABEL: maxs:
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: maxs
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.s $f0, $f1, $f0

; MIPS64R6EL-LABEL: maxs:
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13
%r = tail call float @llvm.maxnum.f32(float %x, float %y)
ret float %r
}

define double @mind(double %x, double %y) {
; MIPS32R6EL-LABEL: mind
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.d $f0, $f1, $f0
; MIPS32R6EL-LABEL: mind:
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: mind
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.d $f0, $f1, $f0

; MIPS64R6EL-LABEL: mind:
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13
%r = tail call double @llvm.minnum.f64(double %x, double %y)
ret double %r
}

define double @maxd(double %x, double %y) {
; MIPS32R6EL-LABEL: maxd
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.d $f0, $f1, $f0
; MIPS32R6EL-LABEL: maxd:
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
;
; MIPS64R6EL-LABEL: maxd
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.d $f0, $f1, $f0

; MIPS64R6EL-LABEL: maxd:
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13
%r = tail call double @llvm.maxnum.f64(double %x, double %y)
ret double %r
}
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